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Message-ID: <20250408151439.29489-1-mpazdan@arista.com>
Date: Tue,  8 Apr 2025 14:22:43 +0000
From: Marek Pazdan <mpazdan@...sta.com>
To: andrew@...n.ch
Cc: aleksander.lobakin@...el.com,
	almasrymina@...gle.com,
	andrew+netdev@...n.ch,
	anthony.l.nguyen@...el.com,
	daniel.zahka@...il.com,
	davem@...emloft.net,
	ecree.xilinx@...il.com,
	edumazet@...gle.com,
	gal@...dia.com,
	horms@...nel.org,
	intel-wired-lan@...ts.osuosl.org,
	jianbol@...dia.com,
	kory.maincent@...tlin.com,
	kuba@...nel.org,
	linux-kernel@...r.kernel.org,
	mpazdan@...sta.com,
	netdev@...r.kernel.org,
	pabeni@...hat.com,
	przemyslaw.kitszel@...el.com,
	willemb@...gle.com
Subject: Re: [Intel-wired-lan] [PATCH 2/2] ice: add qsfp transceiver reset and presence pin control

On Mon, 7 Apr 2025 22:30:54 +0200 Andrew Lunn wrote:

> As the name get/set-phy-tunable suggests, these are for PHY
> properties, like downshift, fast link down, energy detected power
> down.
> 
> What PHY are you using here?

Thanks for review.
It's PHY E810-C in this case. According to spreadsheet: E810_Datasheet_Rev2.4.pdf
(Chapter 17.3.3 E810 SDP[0:7] (GPIO) Connection), it's SDP0 and SDP2 GPIOs 
are being connected to QSFP Reset and Presence pins correspondingly.
I assume you may suggest this use case is not directly PHY related. In first approach
I tried to use reset operation which has following flag in enum ethtool_reset_flags:
ETH_RESET_PHY           = 1 << 6,       /* Transceiver/PHY */
but this doesn't allow for reset asserting and later deasserting so I took 'get/set-phy-tunable'.

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