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Message-Id: <20250408-gicv5-host-v1-14-1f26db465f8d@kernel.org> Date: Tue, 08 Apr 2025 12:50:13 +0200 From: Lorenzo Pieralisi <lpieralisi@...nel.org> To: Marc Zyngier <maz@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org> Cc: Sascha Bischoff <sascha.bischoff@....com>, Timothy Hayes <timothy.hayes@....com>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, Lorenzo Pieralisi <lpieralisi@...nel.org> Subject: [PATCH 14/24] arm64/sysreg: Add ICH_HFGITR_EL2 Add ICH_HFGITR_EL2 register description to sysreg. Signed-off-by: Lorenzo Pieralisi <lpieralisi@...nel.org> Cc: Will Deacon <will@...nel.org> Cc: Catalin Marinas <catalin.marinas@....com> Cc: Marc Zyngier <maz@...nel.org> --- arch/arm64/tools/sysreg | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 1b519e35000be328acfe26d51e098059f9cf9ef2..5af0dea6e775ea680686dbe4bc836b5f5b69fbc7 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -3616,6 +3616,21 @@ Res0 1 Field 0 ICC_APR_EL1 EndSysreg +Sysreg ICH_HFGITR_EL2 3 4 12 9 7 +Res0 63:11 +Field 10 GICRCDNMIA +Field 9 GICRCDIA +Field 8 GICCDDI +Field 7 GICCDEOI +Field 6 GICCDHM +Field 5 GICCRDRCFG +Field 4 GICCDPEND +Field 3 GICCDAFF +Field 2 GICCDPRI +Field 1 GICCDDIS +Field 0 GICCDEN +EndSysreg + Sysreg ICH_HCR_EL2 3 4 12 11 0 Res0 63:32 Field 31:27 EOIcount -- 2.48.0
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