linux-kernel - Re: [PATCH] [Patch v1]Add ETE devarch condition in etm4_init_iomem

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Message-ID: <5099052b6ba2bdd431c06349d81ef3acfb4d9b5d.camel@mediatek.com>
Date: Wed, 9 Apr 2025 03:10:50 +0000
From: Yiru Zhang (张熠儒) <Yiru.Zhang@...iatek.com>
To: "james.clark@...aro.org" <james.clark@...aro.org>, "mike.leach@...aro.org"
	<mike.leach@...aro.org>, "alexander.shishkin@...ux.intel.com"
	<alexander.shishkin@...ux.intel.com>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>, AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>, "suzuki.poulose@....com"
	<suzuki.poulose@....com>
CC: "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-mediatek@...ts.infradead.org"
	<linux-mediatek@...ts.infradead.org>, "coresight@...ts.linaro.org"
	<coresight@...ts.linaro.org>
Subject: Re: [PATCH] [Patch v1]Add ETE devarch condition in
 etm4_init_iomem_access

hi Suzuki, thanks for your reply.
If no ETE condition in etm4_init_iomem_access, the function will return
false and influence following process.
I will send v2 patch using a switch case.

Thanks,
Yiru

On Tue, 2025-04-08 at 10:05 +0100, Suzuki K Poulose wrote:
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> Hi Yiru
> 
> 
> 
> On 08/04/2025 08:36, yiru zhang wrote:
> > Due to ETE supported, so add ETE devarch condition in
> > etm4_init_iomem_access.
> 
> Is there a reason why you cannot use the "system instructions to
> access
> the ETE" ?
> 
> The patch as such is fine by me (withe some minor styling nits). But,
> we
> do not recommend using the MMIO for ETE, when it can be accessed
> directly by sysreg.
> 
> FWIW, if you remove the "mmio base" address from the DT/ACPI, it
> should automatically use the system instructions for ETE.
> 
> 
> 
> 
> > Signed-off-by: yiru zhang <yiru.zhang@...iatek.com>
> > ---
> >   drivers/hwtracing/coresight/coresight-etm4x-core.c | 5 +++--
> >   1 file changed, 3 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > index 2b8f10463840..971b9f0fe5e4 100644
> > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> > @@ -1135,8 +1135,9 @@ static bool etm4_init_iomem_access(struct
> > etmv4_drvdata *drvdata,
> >        * with MMIO. But we cannot touch the OSLK until we are
> >        * sure this is an ETM. So rely only on the TRCDEVARCH.
> >        */
> > -     if ((devarch & ETM_DEVARCH_ID_MASK) !=
> > ETM_DEVARCH_ETMv4x_ARCH) {
> > -             pr_warn_once("TRCDEVARCH doesn't match ETMv4
> > architecture\n");
> > +     if ((devarch & ETM_DEVARCH_ID_MASK) !=
> > ETM_DEVARCH_ETMv4x_ARCH \
> > +     && (devarch & ETM_DEVARCH_ID_MASK) != ETM_DEVARCH_ETE_ARCH) {
> 
> We could use a switch case ?
> 
>         switch (devarch & ETM_DEVARCH_ID_MASK) {
>         case ETM_DEVARCH_ETMv4x_ARCH:
>         case ETM_DEVARCH_ETE_ARCH:
>                 break;
>         default:
>                 pr_warn_once("Unknown ETM architecture: %x\n",
>                                 devarch & ETM_DEVARCH_ID_MASK);
>                 return false;
>         }
> 
> Suzuki
> 
> > +             pr_warn_once("TRCDEVARCH doesn't match ETMv4&ETE
> > architecture\n");
> >               return false;
> >       }
> > 
> 
>