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Message-Id: <20250409153518.3068176-1-Frank.Li@nxp.com>
Date: Wed, 9 Apr 2025 11:35:18 -0400
From: Frank Li <Frank.Li@....com>
To: s-vadapalli@...com
Cc: Frank.Li@....com,
bhelgaas@...gle.com,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
krzk+dt@...nel.org,
kw@...ux.com,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-omap@...r.kernel.org,
linux-pci@...r.kernel.org,
lpieralisi@...nel.org,
manivannan.sadhasivam@...aro.org,
robh@...nel.org,
tony@...mide.com,
vigneshr@...com
Subject: [PATCH 1/1] Revert "ARM: dts: Update pcie ranges for dra7"
This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.
The previous device tree correctly reflects the hardware behavior.
The reverted commit introduced a fake address translation at pcie's parent
bus node.
Reverting this change prepares for the cleanup of the driver's
cpu_addr_fixup() hook.
Signed-off-by: Frank Li <Frank.Li@....com>
---
Previous disscusion at
https://lore.kernel.org/linux-pci/20250314064642.fyf3jqylmc6meft7@uda0492258/
---
arch/arm/boot/dts/ti/omap/dra7.dtsi | 29 +++++++++++------------------
1 file changed, 11 insertions(+), 18 deletions(-)
diff --git a/arch/arm/boot/dts/ti/omap/dra7.dtsi b/arch/arm/boot/dts/ti/omap/dra7.dtsi
index b709703f6c0d4..711ce4c31bb1f 100644
--- a/arch/arm/boot/dts/ti/omap/dra7.dtsi
+++ b/arch/arm/boot/dts/ti/omap/dra7.dtsi
@@ -195,24 +195,22 @@ axi0: target-module@...00000 {
clock-names = "fck", "phy-clk", "phy-clk-div";
#size-cells = <1>;
#address-cells = <1>;
- ranges = <0x51000000 0x51000000 0x3000>,
- <0x20000000 0x20000000 0x10000000>;
+ ranges = <0x51000000 0x51000000 0x3000
+ 0x0 0x20000000 0x10000000>;
dma-ranges;
/**
* To enable PCI endpoint mode, disable the pcie1_rc
* node and enable pcie1_ep mode.
*/
pcie1_rc: pcie@...00000 {
- reg = <0x51000000 0x2000>,
- <0x51002000 0x14c>,
- <0x20001000 0x2000>;
+ reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
reg-names = "rc_dbics", "ti_conf", "config";
interrupts = <0 232 0x4>, <0 233 0x4>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
- <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
+ ranges = <0x81000000 0 0 0x03000 0 0x00010000
+ 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
@@ -235,10 +233,7 @@ pcie1_intc: interrupt-controller {
};
pcie1_ep: pcie_ep@...00000 {
- reg = <0x51000000 0x28>,
- <0x51002000 0x14c>,
- <0x51001000 0x28>,
- <0x20001000 0x10000000>;
+ reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
interrupts = <0 232 0x4>;
num-lanes = <1>;
@@ -269,21 +264,19 @@ axi1: target-module@...00000 {
reset-names = "rstctrl";
#size-cells = <1>;
#address-cells = <1>;
- ranges = <0x51800000 0x51800000 0x3000>,
- <0x30000000 0x30000000 0x10000000>;
+ ranges = <0x51800000 0x51800000 0x3000
+ 0x0 0x30000000 0x10000000>;
dma-ranges;
status = "disabled";
pcie2_rc: pcie@...00000 {
- reg = <0x51800000 0x2000>,
- <0x51802000 0x14c>,
- <0x30001000 0x2000>;
+ reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
reg-names = "rc_dbics", "ti_conf", "config";
interrupts = <0 355 0x4>, <0 356 0x4>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
- <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
+ ranges = <0x81000000 0 0 0x03000 0 0x00010000
+ 0x82000000 0 0x30013000 0x13000 0 0xffed000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
--
2.34.1
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