linux-kernel - Re: [PATCH v2 RESEND] riscv: dts: starfive: fml13v01: enable USB 3.0 port

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Message-ID: <20250409-pulsate-buccaneer-ae996b6ff98e@spud>
Date: Wed, 9 Apr 2025 22:28:53 +0100
From: Conor Dooley <conor@...nel.org>
To: Sandie Cao <sandie.cao@...pcomputing.io>
Cc: Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>, linux-riscv@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Maud Spierings <maud_spierings@...mail.com>
Subject: Re: [PATCH v2 RESEND] riscv: dts: starfive: fml13v01: enable USB 3.0
 port

On Mon, Mar 24, 2025 at 10:09:58AM +0800, Sandie Cao wrote:
> Add usb_cdns3 and usb0_pins configuration to support super speed USB 
> device on the FML13V01 board.
> 
> Signed-off-by: Sandie Cao <sandie.cao@...pcomputing.io>
> Tested-by: Maud Spierings <maud_spierings@...mail.com>

Emil, can I grab this one?

> ---
> 
> Changes in v2:
> - Remove space to pass checkpatch.pl.
> - Add usb0_pins and pass test on board.
> 
>  .../jh7110-deepcomputing-fml13v01.dts         | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> index 8d9ce8b69a71..f2857d021d68 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> @@ -43,9 +43,28 @@ GPOEN_DISABLE,
>  			slew-rate = <0>;
>  		};
>  	};
> +
> +	usb0_pins: usb0-0 {
> +		vbus-pins {
> +			pinmux = <GPIOMUX(25,  GPOUT_SYS_USB_DRIVE_VBUS,
> +					       GPOEN_ENABLE,
> +					       GPI_NONE)>;
> +			bias-disable;
> +			input-disable;
> +			input-schmitt-disable;
> +			slew-rate = <0>;
> +		};
> +	};
>  };
>  
>  &usb0 {
>  	dr_mode = "host";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&usb0_pins>;
>  	status = "okay";
>  };
> +
> +&usb_cdns3 {
> +	phys = <&usbphy0>, <&pciephy0>;
> +	phy-names = "cdns3,usb2-phy", "cdns3,usb3-phy";
> +};
> 
> base-commit: 38818f7c9c179351334b1faffc4d40bd28cc9c72
> -- 
> 2.34.1

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