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Message-ID: <174419899905.31282.16125441491898382603.tip-bot2@tip-bot2>
Date: Wed, 09 Apr 2025 11:43:19 -0000
From: "tip-bot2 for Jiri Olsa" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Jiri Olsa <jolsa@...nel.org>, Ingo Molnar <mingo@...nel.org>,
 Peter Zijlstra <peterz@...radead.org>, Brian Gerst <brgerst@...il.com>,
 Juergen Gross <jgross@...e.com>, "H. Peter Anvin" <hpa@...or.com>,
 Josh Poimboeuf <jpoimboe@...hat.com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: perf/core] uprobes/x86: Add support to emulate NOP5 instruction

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     38440aebd4acc7bb3721eea77829bdb724d2551a
Gitweb:        https://git.kernel.org/tip/38440aebd4acc7bb3721eea77829bdb724d2551a
Author:        Jiri Olsa <jolsa@...nel.org>
AuthorDate:    Tue, 08 Apr 2025 23:13:09 +02:00
Committer:     Ingo Molnar <mingo@...nel.org>
CommitterDate: Wed, 09 Apr 2025 12:35:17 +02:00

uprobes/x86: Add support to emulate NOP5 instruction

Adding support to emulate NOP5 as the original uprobe instruction.

This change speeds up uprobe on top of NOP5 and is a preparation for
usdt probe optimization, that will be done on top of NOP5 instruction.

With this change the usdt probe on top of NOP5 won't take the performance
hit compared to usdt probe on top of standard NOP instruction.

Signed-off-by: Jiri Olsa <jolsa@...nel.org>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Juergen Gross <jgross@...e.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Josh Poimboeuf <jpoimboe@...hat.com>
Link: https://lore.kernel.org/r/20250408211310.51491-1-jolsa@kernel.org
---
 arch/x86/kernel/uprobes.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index 9194695..63cc68e 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -608,6 +608,16 @@ static void riprel_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 		*sr = utask->autask.saved_scratch_register;
 	}
 }
+
+static int is_nop5_insn(uprobe_opcode_t *insn)
+{
+	return !memcmp(insn, x86_nops[5], 5);
+}
+
+static bool emulate_nop5_insn(struct arch_uprobe *auprobe)
+{
+	return is_nop5_insn((uprobe_opcode_t *) &auprobe->insn);
+}
 #else /* 32-bit: */
 /*
  * No RIP-relative addressing on 32-bit
@@ -621,6 +631,10 @@ static void riprel_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 static void riprel_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
 {
 }
+static bool emulate_nop5_insn(struct arch_uprobe *auprobe)
+{
+	return false;
+}
 #endif /* CONFIG_X86_64 */
 
 struct uprobe_xol_ops {
@@ -852,6 +866,8 @@ static int branch_setup_xol_ops(struct arch_uprobe *auprobe, struct insn *insn)
 		break;
 
 	case 0x0f:
+		if (emulate_nop5_insn(auprobe))
+			goto setup;
 		if (insn->opcode.nbytes != 2)
 			return -ENOSYS;
 		/*

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