linux-kernel - Re: [PATCH 22/24] irqchip/gic-v5: Add GICv5 ITS support

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Message-ID: <Z/Z4AFYNQmxTApYi@lpieralisi>
Date: Wed, 9 Apr 2025 15:37:04 +0200
From: Lorenzo Pieralisi <lpieralisi@...nel.org>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: Marc Zyngier <maz@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>,
	Sascha Bischoff <sascha.bischoff@....com>,
	Timothy Hayes <timothy.hayes@....com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH 22/24] irqchip/gic-v5: Add GICv5 ITS support

On Wed, Apr 09, 2025 at 01:13:46PM +0200, Thomas Gleixner wrote:
> On Tue, Apr 08 2025 at 12:50, Lorenzo Pieralisi wrote:
> >  
> > +void gicv5_irs_syncr(void)
> > +{
> > +	u32 syncr;
> > +	u32 statusr;
> > +	int ret;
> > +	struct gicv5_irs_chip_data *irs_data;
> > +
> > +	irs_data = list_first_entry_or_null(&irs_nodes,
> > +					    struct gicv5_irs_chip_data, entry);
> > +	if (WARN_ON(!irs_data))
> > +		return;
> > +
> > +	syncr = FIELD_PREP(GICV5_IRS_SYNCR_SYNC, 1);
> > +	irs_writel(irs_data, syncr, GICV5_IRS_SYNCR);
> > +
> > +	ret = readl_relaxed_poll_timeout_atomic(
> > +			irs_data->irs_base + GICV5_IRS_SYNC_STATUSR, statusr,
> > +			FIELD_GET(GICV5_IRS_SYNC_STATUSR_IDLE, statusr), 1,
> > +			USEC_PER_SEC);
> > +
> > +	if (ret == -ETIMEDOUT)
> > +		pr_err_ratelimited("SYNCR timeout...\n");
> 
> This timeout poll thing looks very familiar by now. Third variant :)
> 
> > +static int gicv5_its_wait_for_invalidation(struct gicv5_its_chip_data *its)
> > +{
> > +	int ret;
> > +	u32 statusr;
> > +
> > +	ret = readl_relaxed_poll_timeout_atomic(
> > +			its->its_base + GICV5_ITS_STATUSR, statusr,
> > +			FIELD_GET(GICV5_ITS_STATUSR_IDLE, statusr), 1,
> > +			USEC_PER_SEC);
> > +
> > +	if (ret == -ETIMEDOUT)
> > +		pr_err_ratelimited("STATUSR timeout...\n");
> > +
> > +	return ret;
> > +}
> 
> And number four follows suit :)
> 
> > +
> > +static void gicv5_its_syncr(struct gicv5_its_chip_data *its,
> > +			    struct gicv5_its_dev *its_dev)
> > +{
> > +	int ret;
> > +	u64 syncr;
> > +	u32 statusr;
> > +
> > +	syncr = FIELD_PREP(GICV5_ITS_SYNCR_SYNC, 1) |
> > +		FIELD_PREP(GICV5_ITS_SYNCR_DEVICEID, its_dev->device_id);
> > +
> > +	its_writeq(its, syncr, GICV5_ITS_SYNCR);
> > +
> > +	ret = readl_relaxed_poll_timeout_atomic(
> > +			its->its_base + GICV5_ITS_SYNC_STATUSR, statusr,
> > +			FIELD_GET(GICV5_ITS_SYNC_STATUSR_IDLE, statusr), 1,
> > +			USEC_PER_SEC);
> > +
> > +	if (ret == -ETIMEDOUT)
> > +		pr_err_ratelimited("SYNCR timeout...\n");
> > +}
> 
> Along with #5 

No question about it, I will consolidate them as much as I can, I
noticed while implementing them then focused on getting the driver
functionality in place and forgot to create a single function,
apologies.

Thanks,
Lorenzo