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Message-ID: <Z/fifUQ4M2doQbHx@lizhi-Precision-Tower-5810>
Date: Thu, 10 Apr 2025 11:23:41 -0400
From: Frank Li <Frank.li@....com>
To: Primoz Fiser <primoz.fiser@...ik.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, devicetree@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, upstream@...ts.phytec.de
Subject: Re: [PATCH 10/13] arm64: dts: freescale: imx93-phyboard-segin: Add
CAN support
On Thu, Apr 10, 2025 at 11:02:48AM +0200, Primoz Fiser wrote:
> Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
> interface. The CAN1_EN regulator enables the SN65HVD234 CAN transceiver
> chip.
Can you use drivers/phy/phy-can-transceiver.c to enable CAN phy instead
of use hacked regulator-flexcan1-en.
Frank
>
> Signed-off-by: Primoz Fiser <primoz.fiser@...ik.com>
> ---
> .../dts/freescale/imx93-phyboard-segin.dts | 32 +++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 38b89398e646..027a34dbaf04 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -26,6 +26,17 @@ chosen {
> stdout-path = &lpuart1;
> };
>
> + reg_flexcan1_en: regulator-flexcan1-en {
> + compatible = "regulator-fixed";
> + enable-active-high;
> + gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_reg_flexcan1_en>;
> + regulator-max-microvolt = <3300000>;
> + regulator-min-microvolt = <3300000>;
> + regulator-name = "CAN1_EN";
> + };
> +
> reg_usdhc2_vmmc: regulator-usdhc2 {
> compatible = "regulator-fixed";
> enable-active-high;
> @@ -38,6 +49,14 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
> };
> };
>
> +/* CAN */
> +&flexcan1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flexcan1>;
> + xceiver-supply = <®_flexcan1_en>;
> + status = "okay";
> +};
> +
> /* I2C2 */
> &lpi2c2 {
> clock-frequency = <400000>;
> @@ -79,6 +98,19 @@ &usdhc2 {
> };
>
> &iomuxc {
> + pinctrl_flexcan1: flexcan1grp {
> + fsl,pins = <
> + MX93_PAD_PDM_BIT_STREAM0__CAN1_RX 0x139e
> + MX93_PAD_PDM_CLK__CAN1_TX 0x139e
> + >;
> + };
> +
> + pinctrl_reg_flexcan1_en: regflexcan1engrp {
> + fsl,pins = <
> + MX93_PAD_ENET2_TD3__GPIO4_IO16 0x31e
> + >;
> + };
> +
> pinctrl_lpi2c2: lpi2c2grp {
> fsl,pins = <
> MX93_PAD_I2C2_SCL__LPI2C2_SCL 0x40000b9e
> --
> 2.34.1
>
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