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Message-Id: <20250410-dt-cpu-schema-v2-3-63d7dc9ddd0a@kernel.org>
Date: Thu, 10 Apr 2025 10:47:24 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>, 
 Jernej Skrabec <jernej.skrabec@...il.com>, 
 Samuel Holland <samuel@...lland.org>, Conor Dooley <conor@...nel.org>, 
 Nicolas Ferre <nicolas.ferre@...rochip.com>, 
 Claudiu Beznea <claudiu.beznea@...on.dev>, 
 Steen Hegelund <Steen.Hegelund@...rochip.com>, 
 Daniel Machon <daniel.machon@...rochip.com>, UNGLinuxDriver@...rochip.com, 
 Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Shawn Guo <shawnguo@...nel.org>, 
 Sascha Hauer <s.hauer@...gutronix.de>, 
 Pengutronix Kernel Team <kernel@...gutronix.de>, 
 Fabio Estevam <festevam@...il.com>, Heiko Stuebner <heiko@...ech.de>, 
 Neil Armstrong <neil.armstrong@...aro.org>, 
 Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>, 
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>, 
 Geert Uytterhoeven <geert+renesas@...der.be>, 
 Magnus Damm <magnus.damm@...il.com>, 
 Lorenzo Pieralisi <lpieralisi@...nel.org>, Andy Gross <agross@...nel.org>, 
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>, 
 Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>, 
 Stephen Boyd <sboyd@...nel.org>, zhouyanjie@...yeetech.com, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 "Rafael J. Wysocki" <rafael@...nel.org>, 
 Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>, 
 Stephan Gerhold <stephan.gerhold@...aro.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org, 
 linux-arm-msm@...r.kernel.org, imx@...ts.linux.dev, 
 linux-rockchip@...ts.infradead.org, linux-amlogic@...ts.infradead.org, 
 linux-renesas-soc@...r.kernel.org, linux-mips@...r.kernel.org, 
 linux-pm@...r.kernel.org, linux-mediatek@...ts.infradead.org
Subject: [PATCH v2 03/17] arm64: dts: microchip: sparx5: Fix CPU node
 "enable-method" property dependencies

The "spin-table" enable-method requires "cpu-release-addr" property,
so add a dummy entry. It is assumed the bootloader will fill in the
correct values.

Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
Reviewed-by: Daniel Machon <daniel.machon@...rochip.com>
Tested-by: Daniel Machon <daniel.machon@...rochip.com>
---
 arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi
index 32bb76b3202a..83bf5c81b5f7 100644
--- a/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5_pcb_common.dtsi
@@ -12,10 +12,12 @@ &psci {
 
 &cpu0 {
 	enable-method = "spin-table";
+	cpu-release-addr = /bits/ 64 <0>;
 };
 
 &cpu1 {
 	enable-method = "spin-table";
+	cpu-release-addr = /bits/ 64 <0>;
 };
 
 &uart0 {

-- 
2.47.2


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