linux-kernel - [PATCH v1 3/9] dt-bindings: qcom: geni-se: describe SA8255p

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20250410174010.31588-4-quic_ptalari@quicinc.com>
Date: Thu, 10 Apr 2025 23:10:04 +0530
From: Praveen Talari <quic_ptalari@...cinc.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jiri Slaby
	<jirislaby@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Viresh Kumar
	<vireshk@...nel.org>, Nishanth Menon <nm@...com>,
        Stephen Boyd
	<sboyd@...nel.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Praveen Talari
	<quic_ptalari@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-serial@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-pm@...r.kernel.org>
CC: <psodagud@...cinc.com>, <djaggi@...cinc.com>, <quic_msavaliy@...cinc.com>,
        <quic_vtanuku@...cinc.com>, <quic_arandive@...cinc.com>,
        <quic_mnaresh@...cinc.com>, <quic_shazhuss@...cinc.com>,
        Nikunj Kela
	<quic_nkela@...cinc.com>
Subject: [PATCH v1 3/9] dt-bindings: qcom: geni-se: describe SA8255p

From: Nikunj Kela <quic_nkela@...cinc.com>

SA8255p platform abstracts resources such as clocks, interconnect
configuration in Firmware.

Add DT bindings for the QUP Wrapper on sa8255p platform.

Co-developed-by: Praveen Talari <quic_ptalari@...cinc.com>
Signed-off-by: Praveen Talari <quic_ptalari@...cinc.com>
Signed-off-by: Nikunj Kela <quic_nkela@...cinc.com>
---
 .../soc/qcom/qcom,sa8255p-geni-se-qup.yaml    | 100 ++++++++++++++++++
 1 file changed, 100 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
new file mode 100644
index 000000000000..cdc2e032f570
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/qcom/qcom,sa8255p-geni-se-qup.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GENI Serial Engine QUP Wrapper Controller
+
+maintainers:
+  - Praveen Talari <quic_ptalari@...cinc.com>
+
+description:
+ Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
+ is a programmable module for supporting a wide range of serial interfaces
+ like UART, SPI, I2C, I3C, etc. A single QUP module can provide up to 8 Serial
+ Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
+ Wrapper controller is modeled as a node with zero or more child nodes each
+ representing a serial engine.
+
+properties:
+  compatible:
+    const: qcom,sa8255p-geni-se-qup
+
+  reg:
+    description: QUP wrapper common register address and length.
+    maxItems: 1
+
+  "#address-cells":
+    const: 2
+
+  "#size-cells":
+    const: 2
+
+  ranges: true
+
+  iommus:
+    maxItems: 1
+
+  dma-coherent: true
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+
+patternProperties:
+  "spi@[0-9a-f]+$":
+    type: object
+    description: GENI serial engine based SPI controller. SPI in master mode
+                 supports up to 50MHz, up to four chip selects, programmable
+                 data path from 4 bits to 32 bits and numerous protocol
+                 variants.
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: qcom,sa8255p-geni-spi
+
+  "i2c@[0-9a-f]+$":
+    type: object
+    description: GENI serial engine based I2C controller.
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: qcom,sa8255p-geni-i2c
+
+  "serial@[0-9a-f]+$":
+    type: object
+    description: GENI Serial Engine based UART Controller.
+    additionalProperties: true
+
+    properties:
+      compatible:
+        const: qcom,sa8255p-geni-uart
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    geniqup@...000 {
+        compatible = "qcom,sa8255p-geni-se-qup";
+        reg = <0 0x9c0000 0 0x6000>;
+        #address-cells = <2>;
+        #size-cells = <2>;
+        ranges;
+
+        serial@...000 {
+            compatible = "qcom,sa8255p-geni-uart";
+            reg = <0 0x990000 0 0x4000>;
+            interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
+            power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
+            power-domain-names = "power", "perf";
+        };
+    };
+...
-- 
2.17.1