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Message-ID: <m5vw3et7qquuuwkrscs3e7yvjyx7obuc2legrzbsnd7ahz6vdk@elvuty2lrudc>
Date: Fri, 11 Apr 2025 00:01:07 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
Cc: amitk@...nel.org, thara.gopinath@...il.com, rafael@...nel.org,
daniel.lezcano@...aro.org, rui.zhang@...el.com, lukasz.luba@....com,
david.collins@....qualcomm.com, srinivas.kandagatla@...aro.org,
stefan.schmidt@...aro.org, quic_tsoni@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org, dmitry.baryshkov@...aro.org
Subject: Re: [PATCH v3 1/5 RESEND] thermal: qcom-spmi-temp-alarm: enable
stage 2 shutdown when required
On Thu, Mar 20, 2025 at 01:24:04PM -0700, Anjelique Melendez wrote:
> From: David Collins <david.collins@....qualcomm.com>
>
> Certain TEMP_ALARM GEN2 PMIC peripherals need over-temperature
> stage 2 automatic PMIC partial shutdown to be enabled in order to
> avoid repeated faults in the event of reaching over-temperature
> stage 3. Modify the stage 2 shutdown control logic to ensure that
> stage 2 shutdown is enabled on all affected PMICs. Read the
> digital major and minor revision registers to identify these
> PMICs.
It would be nice to mention affected PMICs (at least thsoe supported
upstream).
>
> Signed-off-by: David Collins <david.collins@....qualcomm.com>
> Signed-off-by: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
> ---
> drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 32 +++++++++++++++++++--
> 1 file changed, 30 insertions(+), 2 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
--
With best wishes
Dmitry
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