linux-kernel - Re: [PATCH 1/2] drivers/edac: Add L1 and L2 error detection for A53, A57 and A72

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Message-ID: <eff8d726-d25e-4424-846f-fd3cfa249315@linux.microsoft.com>
Date: Thu, 10 Apr 2025 15:27:18 -0700
From: Vijay Balakrishna <vijayb@...ux.microsoft.com>
To: "Tyler Hicks (Microsoft)" <code@...icks.com>
Cc: Borislav Petkov <bp@...en8.de>, Tony Luck <tony.luck@...el.com>,
 James Morse <james.morse@....com>, Mauro Carvalho Chehab
 <mchehab@...nel.org>, Robert Richter <rric@...nel.org>,
 linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
 Marc Zyngier <maz@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>
Subject: Re: [PATCH 1/2] drivers/edac: Add L1 and L2 error detection for A53,
 A57 and A72

On 4/10/2025 1:04 PM, Tyler Hicks (Microsoft) wrote:
>> +		snprintf(msg, MESSAGE_SIZE, "%s %s error(s) on CPU %d",
>> +			 str, fatal ? "fatal" : "correctable", cpu);
>> +
>> +		if (fatal)
>> +			edac_device_handle_ue(edac_ctl, cpu, 0, msg);
>> +		else
>> +			edac_device_handle_ce(edac_ctl, cpu, 0, msg);
>> +
>> +		write_sysreg_s(0, SYS_CPUMERRSR_EL1);
>> +		isb();
> I think the register writes and barriers should happen much closer to the
> register reads, in read_errors(). Looking back at Marc's feedback on v5, I
> think his most important piece of feedback was to only clear the register when
> the valid bit is set to avoid accidentally clobbering an error that came in
> between the register read and write.
> 
> By moving the register writes into report_errors() in this v6 series, there's
> now a much larger window where new errors could occur between the register
> read and the register write. Those new errors would be silently lost/ignored.
> Reducing the window to the least number of cycles seems important for accurate
> reporting.

Moving clear to report_errors() is wrong actually, it has be cleared 
from the CPU, from read_errors() which is a SMP call. Let me share new 
version with changes.

Thanks,
Vijay