linux-kernel - Re: [PATCH 2/2] dt-bindings: arm: cpus: Add edac-enabled property

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <319b7c65-3e2f-456b-a845-45f7a57ba2c5@kernel.org>
Date: Thu, 10 Apr 2025 08:00:55 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Vijay Balakrishna <vijayb@...ux.microsoft.com>,
 Borislav Petkov <bp@...en8.de>, Tony Luck <tony.luck@...el.com>
Cc: James Morse <james.morse@....com>,
 Mauro Carvalho Chehab <mchehab@...nel.org>, Robert Richter
 <rric@...nel.org>, linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
 Tyler Hicks <code@...icks.com>, Marc Zyngier <maz@...nel.org>,
 Sascha Hauer <s.hauer@...gutronix.de>
Subject: Re: [PATCH 2/2] dt-bindings: arm: cpus: Add edac-enabled property

On 10/04/2025 01:36, Vijay Balakrishna wrote:
> From: Sascha Hauer <s.hauer@...gutronix.de>
> 
> Some ARM Cortex CPUs like the A53, A57 and A72 have Error Detection And
> Correction (EDAC) support on their L1 and L2 caches. This is implemented
> in implementation defined registers, so usage of this functionality is
> not safe in virtualized environments or when EL3 already uses these
> registers. This patch adds a edac-enabled flag which can be explicitly
> set when EDAC can be used.

Can't hypervisor tell you that?

> 
> Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
> [vijayb: Added A72 to the commit message]
> Signed-off-by: Vijay Balakrishna <vijayb@...ux.microsoft.com>
> ---
>  Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
> index 2e666b2a4dcd..18d649a18552 100644
> --- a/Documentation/devicetree/bindings/arm/cpus.yaml
> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
> @@ -331,6 +331,12 @@ properties:
>        corresponding to the index of an SCMI performance domain provider, must be
>        "perf".
>  
> +  edac-enabled:
> +    $ref: '/schemas/types.yaml#/definitions/flag'

Drop quotes - look at every other line.

<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC. It might happen, that command when run on an older
kernel, gives you outdated entries. Therefore please be sure you base
your patches on recent Linux kernel.

Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline) or work on fork of kernel
(don't, instead use mainline). Just use b4 and everything should be
fine, although remember about `b4 prep --auto-to-cc` if you added new
patches to the patchset.

You missed at least devicetree list (maybe more), so this won't be
tested by automated tooling. Performing review on untested code might be
a waste of time.

Please kindly resend and include all necessary To/Cc entries.
</form letter>

Best regards,
Krzysztof