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Message-Id: <174437346409.673939.2537740696548096560.b4-ty@kernel.org>
Date: Fri, 11 Apr 2025 17:41:04 +0530
From: Vinod Koul <vkoul@...nel.org>
To: kishon@...nel.org, p.zabel@...gutronix.de, abel.vesa@...aro.org,
quic_qianyu@...cinc.com, neil.armstrong@...aro.org,
manivannan.sadhasivam@...aro.org, quic_devipriy@...cinc.com,
konrad.dybcio@....qualcomm.com, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org,
Dmitry Baryshkov <lumag@...nel.org>, Wenbin Yao <quic_wenbyao@...cinc.com>
Cc: krishna.chundru@....qualcomm.com, quic_vbadigan@...cinc.com,
quic_mrana@...cinc.com, quic_cang@...cinc.com
Subject: Re: [PATCH v7 0/2] phy: qcom: qmp-pcie: Add PCIe PHY no_csr reset
support
On Fri, 11 Apr 2025 19:31:18 +0800, Wenbin Yao wrote:
> The series aims to skip phy register programming and drive PCIe PHY with
> register setting programmed in bootloader by simply toggling no_csr reset,
> which once togglled, PHY hardware will be reset while PHY registers are
> retained.
>
> First, determine whether PHY setting can be skipped by checking
> QPHY_START_CTRL register and the existence of nocsr reset. If it is
> programmed and no_csr reset is supported, do no_csr reset and skip BCR
> reset which will reset entire PHY.
>
> [...]
Applied, thanks!
[1/2] phy: qcom: pcie: Determine has_nocsr_reset dynamically
commit: ea57d7fe4f5af517b5ce91fdff96cc33be932690
[2/2] phy: qcom: qmp-pcie: Add PHY register retention support
commit: 0cc22f5a861c3149171485349dafac3047212a5d
Best regards,
--
~Vinod
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