linux-kernel - Re: [PATCH v1 2/9] dt-bindings: serial: describe SA8255p

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Message-ID: <20250411175730.GA3642862-robh@kernel.org>
Date: Fri, 11 Apr 2025 12:57:30 -0500
From: Rob Herring <robh@...nel.org>
To: Praveen Talari <quic_ptalari@...cinc.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Jiri Slaby <jirislaby@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Viresh Kumar <vireshk@...nel.org>, Nishanth Menon <nm@...com>,
	Stephen Boyd <sboyd@...nel.org>,
	"Rafael J. Wysocki" <rafael@...nel.org>,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-serial@...r.kernel.org, devicetree@...r.kernel.org,
	linux-pm@...r.kernel.org, psodagud@...cinc.com, djaggi@...cinc.com,
	quic_msavaliy@...cinc.com, quic_vtanuku@...cinc.com,
	quic_arandive@...cinc.com, quic_mnaresh@...cinc.com,
	quic_shazhuss@...cinc.com, Nikunj Kela <quic_nkela@...cinc.com>
Subject: Re: [PATCH v1 2/9] dt-bindings: serial: describe SA8255p

On Thu, Apr 10, 2025 at 11:10:03PM +0530, Praveen Talari wrote:
> From: Nikunj Kela <quic_nkela@...cinc.com>
> 
> SA8255p platform abstracts resources such as clocks, interconnect and
> GPIO pins configuration in Firmware. SCMI power and perf protocols are
> used to send request for resource configurations.
> 
> Add DT bindings for the QUP GENI UART controller on sa8255p platform.
> 
> Co-developed-by: Praveen Talari <quic_ptalari@...cinc.com>
> Signed-off-by: Praveen Talari <quic_ptalari@...cinc.com>

Your tags go last because you touched this last (I assume). The order 
here would be correct if you were the original author, but Nikunj made 
significant enough changes to change the author and also sent the 
patches. The sender always has the last S-o-b (until the maintainer 
adds their's when applying).

> Signed-off-by: Nikunj Kela <quic_nkela@...cinc.com>
> ---
>  .../serial/qcom,sa8255p-geni-uart.yaml        | 59 +++++++++++++++++++
>  1 file changed, 59 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
> 
> diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
> new file mode 100644
> index 000000000000..0dbfbfa1d504
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Geni based QUP UART interface
> +
> +maintainers:
> +  - Praveen Talari <quic_ptalari@...cinc.com>
> +
> +allOf:
> +  - $ref: /schemas/serial/serial.yaml#
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sa8255p-geni-uart
> +      - qcom,sa8255p-geni-debug-uart
> +
> +  interrupts:
> +    minItems: 1
> +    items:
> +      - description: UART core irq
> +      - description: Wakeup irq (RX GPIO)

If this is a wakeup source, then you should have interrupt-names with 
'wakeup' for the 2nd irq.

> +
> +  power-domains:
> +    minItems: 2
> +    maxItems: 2
> +
> +  power-domain-names:
> +    items:
> +      - const: power
> +      - const: perf
> +
> +  reg:
> +    maxItems: 1

'reg' goes after compatible.

> +
> +required:
> +  - compatible
> +  - interrupts
> +  - reg
> +  - power-domains
> +  - power-domain-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    serial@...000 {
> +        compatible = "qcom,sa8255p-geni-uart";
> +        reg = <0x990000 0x4000>;
> +        interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
> +        power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
> +        power-domain-names = "power", "perf";
> +    };
> +...
> -- 
> 2.17.1
>