[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7b91d929-fe97-44c6-aa94-05417bce1014@intel.com>
Date: Fri, 11 Apr 2025 11:23:32 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: Sohil Mehta <sohil.mehta@...el.com>, <linux-kernel@...r.kernel.org>
CC: <x86@...nel.org>, <tglx@...utronix.de>, <mingo@...hat.com>,
<bp@...en8.de>, <dave.hansen@...ux.intel.com>
Subject: Re: [PATCH RFC v2a 5/9] x86/cpufeatures: Add X86_FEATURE_APX
On 4/11/2025 9:54 AM, Sohil Mehta wrote:
> On 4/11/2025 9:12 AM, Chang S. Bae wrote:
>
>> +#define X86_FEATURE_APX (21*32 + 9) /* Advanced #Performance Extensions */
>
> Is the '#' before 'Performance' intentional? The previous version didn't
> seem to have it.
Oh no — I only meant to update the bit position. My bad!
> I don't think this table follows any specific logic, but recent patches
> have tried grouping by similar features or features with similar
> dependencies.
>
> I don't have a preference, but should this be inserted closer to other
> XSAVE dependent features?
>
> { X86_FEATURE_PKU, X86_FEATURE_XSAVE },
> { X86_FEATURE_MPX, X86_FEATURE_XSAVE },
> { X86_FEATURE_XGETBV1, X86_FEATURE_XSAVE },
> + { X86_FEATURE_APX, X86_FEATURE_XSAVE },
> { X86_FEATURE_CMOV, X86_FEATURE_FXSR },
> There is a comment on top of that table that says:
> "Please keep the leaf sorted by cpuid_bit.level for faster search."
>
> Based on that, APX should be inserted here:
>
> { X86_FEATURE_INTEL_PPIN, CPUID_EBX, 0, 0x00000007, 1 },
> +{ X86_FEATURE_APX, CPUID_EDX, 21, 0x00000007, 1 },
> { X86_FEATURE_RRSBA_CTRL, CPUID_EDX, 2, 0x00000007, 2 },Yeah, both suggestions make sense. Thanks for pointing them out!
I've attached the patch revision.
Thanks,
Chang
View attachment "0005-x86-cpufeatures-Add-X86_FEATURE_APX.patch" of type "text/plain" (3234 bytes)
Powered by blists - more mailing lists