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Message-ID: <57fac14e-e4fe-41a3-a5f9-01447f2ff62d@quicinc.com>
Date: Fri, 11 Apr 2025 16:05:48 +0530
From: Nitin Rawat <quic_nitirawa@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
CC: <vkoul@...nel.org>, <kishon@...nel.org>,
<manivannan.sadhasivam@...aro.org>,
<James.Bottomley@...senpartnership.com>, <martin.petersen@...cle.com>,
<bvanassche@....org>, <bjorande@...cinc.com>,
<neil.armstrong@...aro.org>, <konrad.dybcio@....qualcomm.com>,
<quic_rdwivedi@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-scsi@...r.kernel.org>
Subject: Re: [PATCH V3 0/9] Refactor phy powerup sequence
On 4/11/2025 1:35 AM, Dmitry Baryshkov wrote:
> On Thu, Apr 10, 2025 at 02:30:53PM +0530, Nitin Rawat wrote:
>> In Current code regulators enable, clks enable, calibrating UFS PHY,
>> start_serdes and polling PCS_ready_status are part of phy_power_on.
>>
>> UFS PHY registers are retained after power collapse, meaning calibrating
>> UFS PHY, start_serdes and polling PCS_ready_status can be done only when
>> hba is powered_on, and not needed every time when phy_power_on is called
>> during resume. Hence keep the code which enables PHY's regulators & clks
>> in phy_power_on and move the rest steps into phy_calibrate function.
>>
>> Since phy_power_on is separated out from phy calibrate, make separate calls
>> to phy_power_on and phy_calibrate calls from ufs qcom driver.
>>
>> Also for better power saving, remove the phy_power_on/off calls from
>> resume/suspend path and put them to ufs_qcom_setup_clocks, so that
>> PHY's regulators & clks can be turned on/off along with UFS's clocks.
>
> Please add an explicit note that patch1 is a requirement for the rest of
> the PHY patches. It might make sense to merge it through the PHY tree
> too (or to use an immutable branch).
>
Hi Dmitry,
Thanks for the suggestion. Sure I would mention this in the cover letter
when I post next patchset.
Thanks,
Nitin
>>
>> This patch series is tested on SM8550 QRD, SM8650 MTP , SM8750 MTP.
>>
>
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