linux-kernel - RE: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

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Message-ID:
 <DM4PR12MB6158AC2A27BD6D7AF8C852C0CDB02@DM4PR12MB6158.namprd12.prod.outlook.com>
Date: Sun, 13 Apr 2025 04:22:06 +0000
From: "Musham, Sai Krishna" <sai.krishna.musham@....com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>, "kw@...ux.com" <kw@...ux.com>, "robh@...nel.org"
	<robh@...nel.org>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "cassel@...nel.org"
	<cassel@...nel.org>, "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "Simek,
 Michal" <michal.simek@....com>, "Gogada, Bharat Kumar"
	<bharat.kumar.gogada@....com>, "Havalige, Thippeswamy"
	<thippeswamy.havalige@....com>
Subject: RE: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST#
 signal

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Krzysztof,

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: Friday, April 4, 2025 12:42 PM
> To: Musham, Sai Krishna <sai.krishna.musham@....com>; Manivannan
> Sadhasivam <manivannan.sadhasivam@...aro.org>
> Cc: bhelgaas@...gle.com; lpieralisi@...nel.org; kw@...ux.com; robh@...nel.org;
> krzk+dt@...nel.org; conor+dt@...nel.org; cassel@...nel.org; linux-
> pci@...r.kernel.org; devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
> Simek, Michal <michal.simek@....com>; Gogada, Bharat Kumar
> <bharat.kumar.gogada@....com>; Havalige, Thippeswamy
> <thippeswamy.havalige@....com>
> Subject: Re: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST#
> signal
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On 04/04/2025 09:03, Musham, Sai Krishna wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > Hi Krzysztof,
> >
> > Thank you for reviewing.
> >
> >> -----Original Message-----
> >> From: Krzysztof Kozlowski <krzk@...nel.org>
> >> Sent: Thursday, March 27, 2025 11:38 PM
> >> To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>; Musham,
> >> Sai Krishna <sai.krishna.musham@....com>
> >> Cc: bhelgaas@...gle.com; lpieralisi@...nel.org; kw@...ux.com;
> >> robh@...nel.org;
> >> krzk+dt@...nel.org; conor+dt@...nel.org; cassel@...nel.org; linux-
> >> pci@...r.kernel.org; devicetree@...r.kernel.org;
> >> linux-kernel@...r.kernel.org; Simek, Michal <michal.simek@....com>;
> >> Gogada, Bharat Kumar <bharat.kumar.gogada@....com>; Havalige,
> >> Thippeswamy <thippeswamy.havalige@....com>
> >> Subject: Re: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP
> >> PERST# signal
> >>
> >> Caution: This message originated from an External Source. Use proper
> >> caution when opening attachments, clicking links, or responding.
> >>
> >>
> >> On 27/03/2025 18:25, Manivannan Sadhasivam wrote:
> >>>>  /**
> >>>> @@ -551,6 +600,27 @@ static int xilinx_cpm_pcie_parse_dt(struct
> >> xilinx_cpm_pcie *port,
> >>>>              port->reg_base = port->cfg->win;
> >>>>      }
> >>>>
> >>>> +    port->crx_base = devm_platform_ioremap_resource_byname(pdev,
> >>>> +                                                           "cpm_crx");
> >>>> +    if (IS_ERR(port->crx_base)) {
> >>>> +            if (PTR_ERR(port->crx_base) == -EINVAL)
> >>>> +                    port->crx_base = NULL;
> >>>> +            else
> >>>> +                    return PTR_ERR(port->crx_base);
> >>>> +    }
> >>>> +
> >>>> +    if (port->variant->version == CPM5NC_HOST) {
> >>>> +            port->cpm5nc_attr_base =
> >>>> +                    devm_platform_ioremap_resource_byname(pdev,
> >>>> +
> >>>> + "cpm5nc_attr");
> >>>
> >>> Where is this resource defined in the binding?
> >>>
> >>
> >> So this is v6 and still not tested.
> >>
> >> Where is the DTS using this binding and driver, so we can verify that
> >> AMD is not sending us such totally bogus, downstream code?
> >>
> >
> > This patch is tested for mentioned CPM versions, I apologize that
>
> No, it wasn't. Testing would point that out.
>
> > I missed adding the cpm5nc_attr resource in DT binding. I will not
> > repeat this again. I will add the resource in the next patch.
> > Thanks for your understanding.
>
> Again, where is the DTS?

I will update DTS and send the patch.

>
> Best regards,
> Krzysztof


Thanks,
Sai Krishna