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Message-ID: <7b619cf2-8f50-4f6e-9a5f-cce9112a99b3@linux.intel.com>
Date: Mon, 14 Apr 2025 17:16:23 +0300
From: Jarkko Nikula <jarkko.nikula@...ux.intel.com>
To: ende.tan@...rfivetech.com, linux-i2c@...r.kernel.org
Cc: andriy.shevchenko@...ux.intel.com, mika.westerberg@...ux.intel.com,
jsd@...ihalf.com, andi.shyti@...nel.org, linux-kernel@...r.kernel.org,
leyfoon.tan@...rfivetech.com, endeneer@...il.com
Subject: Re: [v2,1/1] i2c: designware: Add SMBus Quick Command support
Hi
On 4/12/25 12:34 PM, ende.tan@...rfivetech.com wrote:
> From: Tan En De <ende.tan@...rfivetech.com>
>
> Add support for SMBus Quick Read and Quick Write commands.
>
> Signed-off-by: Tan En De <ende.tan@...rfivetech.com>
> ---
> v1 -> v2: Removed redundant check of tx_limit and rx_limit
> ---
> drivers/i2c/busses/i2c-designware-core.h | 4 ++++
> drivers/i2c/busses/i2c-designware-master.c | 18 +++++++++++++++++-
> 2 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
> index 347843b4f5dd..91f17181ece1 100644
> --- a/drivers/i2c/busses/i2c-designware-core.h
> +++ b/drivers/i2c/busses/i2c-designware-core.h
> @@ -40,6 +40,8 @@
>
> #define DW_IC_DATA_CMD_DAT GENMASK(7, 0)
> #define DW_IC_DATA_CMD_FIRST_DATA_BYTE BIT(11)
> +#define DW_IC_DATA_CMD_STOP BIT(9)
> +#define DW_IC_DATA_CMD_CMD BIT(8)
>
If you like these defines would be nice to have in another patch before
this and convert i2c-designware-master.c to use them instead of 0x100,
BIT(9) and BIT(10) in existing code. Makes code more uniform together
with your change.
I'm not demanding it but wanted to give you idea if you like to do some
additional cleanups to the code :-)
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