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Message-ID: <20250414080344-GYA28186@gentoo>
Date: Mon, 14 Apr 2025 08:03:44 +0000
From: Yixun Lan <dlan@...too.org>
To: Uwe Kleine-König <ukleinek@...nel.org>
Cc: Guodong Xu <guodong@...cstar.com>, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, alex@...ti.fr, p.zabel@...gutronix.de,
drew@...7.com, inochiama@...il.com, geert+renesas@...der.be,
heylenay@....org, tglx@...utronix.de, hal.feng@...rfivetech.com,
unicorn_wang@...look.com, duje.mihanovic@...le.hr,
elder@...cstar.com, linux-pwm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev
Subject: Re: [PATCH 7/9] riscv: dts: spacemit: Add PWM14 backlight support
for BPI-F3
Hi Uwe,
On 07:58 Mon 14 Apr , Uwe Kleine-König wrote:
> Hello,
>
> On Fri, Apr 11, 2025 at 09:14:21PM +0800, Guodong Xu wrote:
> > +&pwm14 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pwm14_1_cfg>;
> > + status = "disabled";
> > +};
>
> I wonder if the pinctrl properties can better be added to the SoC's
> .dtsi file. (Only applies if this is a canonical choice, i.e. there is
> no other possible output configuration.)
>
I'd agree it's a good idea and should follow, but unfortunately in the
practical case, all pwm able to route to at least two different pins..
https://developer.spacemit.com/documentation?token=YiJZwXA2Ri4nJikV9E1cp6nqnMh
see section: 4.5 Multi-Function I/O Pin Assignments
--
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55
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