linux-kernel - Re: [PATCH v5 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support

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Message-ID: <CAMuHMdXTnuMf-RryuKgLfSUPxrZ9uBzQE9R9hDzLaM473WQQyQ@mail.gmail.com>
Date: Tue, 15 Apr 2025 14:39:04 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc: Vinod Koul <vkoul@...nel.org>, Magnus Damm <magnus.damm@...il.com>, 
	Biju Das <biju.das.jz@...renesas.com>, 
	Wolfram Sang <wsa+renesas@...g-engineering.com>, 
	Uwe Kleine-König <u.kleine-koenig@...libre.com>, 
	dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-renesas-soc@...r.kernel.org, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v5 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support

On Wed, 5 Mar 2025 at 01:21, Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is
> similar to the version found on the Renesas RZ/G2L family of
> SoCs, but there are some differences:
> * It only uses one register area
> * It only uses one clock
> * It only uses one reset
> * Instead of using MID/IRD it uses REQ No
> * It is connected to the Interrupt Control Unit (ICU)
> * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5
>
> Add specific support for the Renesas RZ/V2H(P) family of SoC by
> tackling the aforementioned differences.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> ---
> v4->v5:
> * Reused RZ/G2L cell specification (with REQ No in place of MID/RID).
> * Dropped ACK No.
> * Removed mid_rid/req_no/ack_no union and reused mid_rid for REQ No.
> * Other small improvements.

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds