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Message-ID: <cover.1744692494.git.nicolinc@nvidia.com>
Date: Mon, 14 Apr 2025 21:57:35 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: <will@...nel.org>, <robin.murphy@....com>, <jgg@...dia.com>
CC: <joro@...tes.org>, <kevin.tian@...el.com>, <praan@...gle.com>,
<nathan@...nel.org>, <yi.l.liu@...el.com>, <peterz@...radead.org>,
<mshavit@...gle.com>, <jsnitsel@...hat.com>, <smostafa@...gle.com>,
<jeff.johnson@....qualcomm.com>, <zhangzekun11@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>, <iommu@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>, <shameerali.kolothum.thodi@...wei.com>
Subject: [PATCH v2 00/11] iommu/arm-smmu-v3: Allocate vmid per vsmmu instead of s2_parent
With a system having multiple SMMU physical instances, multiple vSMMUs can
be allocated for a VM that deivces behind different SMMUs are assigned to.
In such a use case, the IPA->PA mappings (i.e. the stage-2 I/O page table)
can be shared across the vSMMU instances.
With a shareable S2 parent domain, it is more natural to store a vmid per
vSMMU instance v.s. a shared S2 domain, since each physical SMMU instance
maintains its own vmid bitmap.
Have a few patches to get the functions ready for the vmid migration. And
decouple the vmid from S2 parent domains and move its allocation to vSMMU
instances. Note that a regular S2 domain (!nest_parent) has to retain the
s2_cfg and vmid for non-nesting use cases, if the SMMU HW doesn't support
stage 1. Maintain a per-S2-domain vsmmus list and a per-vSMMU ats_devices
list to iterate for S2 cache invalidation cmds and ATC invalidation cmds.
This is on Github:
https://github.com/nicolinc/iommufd/commits/smmuv3_vmid-v2
Changelog
v2
* Add Reviewed-by from Jason and Pranjal
* Add WARN_ON_ONCE(!vmid) in arm_smmu_make_s2_domain_ste()
* Add arm_smmu_s2_parent_can_share() for a compatibility check
* Introduce arm_smmu_s2_parent_tlb_inv_* helpers replacing the non-nesting
routines
* Introduce arm_vsmmu_atc_inv_domain() using a per-vSMMU ats_devices list,
replacing the nested_ats_flush in struct arm_smmu_master_domain
v1
https://lore.kernel.org/all/cover.1741150594.git.nicolinc@nvidia.com/
Thanks
Nicolin
Nicolin Chen (11):
iommu/arm-smmu-v3: Pass in vmid to arm_smmu_make_s2_domain_ste()
iommu/arm-smmu-v3: Pass in smmu/iommu_domain to
__arm_smmu_tlb_inv_range()
iommu/arm-smmu-v3: Share cmdq/cmd helpers with arm-smmu-v3-iommufd
iommu/arm-smmu-v3: Add an inline arm_smmu_tlb_inv_vmid helper
iommu/arm-smmu-v3: Rename arm_smmu_attach_prepare_vmaster
iommu/arm-smmu-v3: Introduce arm_smmu_s2_parent_tlb_ invalidation
helpers
iommu/arm-smmu-v3: Introduce arm_vsmmu_atc_inv_domain()
iommu/arm-smmu-v3: Use vSMMU helpers for S2 and ATC invalidations
iommu/arm-smmu-v3: Clean up nested_ats_flush from master_domain
iommu/arm-smmu-v3: Decouple vmid from S2 nest_parent domain
iommu/arm-smmu-v3: Allow to share S2 nest_parent domain across vSMMUs
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 77 +++++++-
.../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 175 ++++++++++++++++--
.../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c | 3 +-
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 139 +++++++-------
4 files changed, 297 insertions(+), 97 deletions(-)
--
2.43.0
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