lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <07a38758876925a117e3874327141e935e1aec4d.camel@phytec.de>
Date: Tue, 15 Apr 2025 08:52:45 +0000
From: Yannic Moog <Y.Moog@...tec.de>
To: "Frank.li@....com" <Frank.li@....com>
CC: "robh@...nel.org" <robh@...nel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"shawnguo@...nel.org" <shawnguo@...nel.org>, Teresa Remmet
	<T.Remmet@...tec.de>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "kernel@...gutronix.de"
	<kernel@...gutronix.de>, Benjamin Hahn <B.Hahn@...tec.de>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, Yashwanth Varakala <Y.Varakala@...tec.de>, Jan Remmet
	<J.Remmet@...tec.de>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "upstream@...ts.phytec.de"
	<upstream@...ts.phytec.de>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>,
	"festevam@...il.com" <festevam@...il.com>
Subject: Re: [PATCH v2 3/3] arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel
 overlay

On Thu, 2025-04-03 at 14:31 -0400, Frank Li wrote:
> On Thu, Apr 03, 2025 at 01:29:29PM +0200, Yannic Moog wrote:
> > The Libra board has an LVDS connector. Add an overlay for an
> > etml1010g3dra LVDS panel supported for the phyCORE-i.MX 8M Plus that may
> > be connected to it.
> > 
> > Signed-off-by: Yannic Moog <y.moog@...tec.de>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile             |  2 +
> >  .../imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso  | 44 ++++++++++++++++++++++
> >  2 files changed, 46 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index df792553be479afcb6fa50dcd25a7eb63b67bc44..aa349ee35d5b310512f05c92390d5c2a27df81bb 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -201,6 +201,8 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-dl.dtb
> > 
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-kontron-smarc-eval-carrier.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc.dtb
> > +imx8mp-libra-rdk-fpsc-lvds-dtbs += imx8mp-libra-rdk-fpsc.dtb imx8mp-libra-rdk-fpsc-lvds-
> > etml1010g3dra.dtbo
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-libra-rdk-fpsc-lvds.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..1dcf249ca90d2b4d9720a55de39e3f8564780dc3
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso
> > @@ -0,0 +1,44 @@
> > +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
> > +/*
> > + * Copyright (C) 2025 PHYTEC Messtechnik GmbH
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/clock/imx8mp-clock.h>
> > +
> > +/dts-v1/;
> > +/plugin/;
> > +
> > +&backlight_lvds0 {
> > +	brightness-levels = <0 8 16 32 64 128 255>;
> > +	default-brightness-level = <8>;
> > +	enable-gpios = <&gpio5 23 GPIO_ACTIVE_LOW>;
> > +	num-interpolated-steps = <2>;
> > +	pwms = <&pwm1 0 66667 0>;
> > +	status = "okay";
> > +};
> > +
> > +&lcdif2 {
> > +	status = "okay";
> > +};
> > +
> > +&lvds_bridge {
> > +	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_LDB>, <&clk IMX8MP_VIDEO_PLL1>;
> > +	assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
> > +	/*
> > +	 * The LVDS panel uses 72.4 MHz pixel clock, set IMX8MP_VIDEO_PLL1 to
> > +	 * 72.4 * 7 = 506.8 MHz so the LDB serializer and LCDIFv3 scanout
> > +	 * engine can reach accurate pixel clock of exactly 72.4 MHz.
> > +	 */
> > +	assigned-clock-rates = <0>, <506800000>;
> 
> why assin IMX8MP_CLK_MEDIA_LDB rate to 0?

Because afaik we don't need it and I would like to keep the MEDIA_LDB clock entry. We only care
about the pixel clock for the panel.
The clock-rate for CLK_MEDIA_LDB is omitted in imx8mp.dtsi and the 0 makes sure it stays that way.

Yannic

> 
> Frank
> > +	status = "okay";
> > +};
> > +
> > +&panel0_lvds {
> > +	compatible = "edt,etml1010g3dra";
> > +	status = "okay";
> > +};
> > +
> > +&pwm1 {
> > +	status = "okay";
> > +};
> > 
> > --
> > 2.49.0
> > 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ