linux-kernel - Re: [PATCH v14 3/4] arm64: dts: qcom: ipq5332: Add PCIe related nodes

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Message-ID: <20250415095023.dxipm4hd73jxoe4n@hu-varada-blr.qualcomm.com>
Date: Tue, 15 Apr 2025 15:20:23 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
CC: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
        <manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Praveenkumar I
	<quic_ipkumar@...cinc.com>
Subject: Re: [PATCH v14 3/4] arm64: dts: qcom: ipq5332: Add PCIe related nodes

On Fri, Apr 11, 2025 at 01:22:39PM +0200, Konrad Dybcio wrote:
> On 3/17/25 11:00 AM, Varadarajan Narayanan wrote:
> > From: Praveenkumar I <quic_ipkumar@...cinc.com>
> >
> > Add phy and controller nodes for pcie0_x1 and pcie1_x2.
> >
> > Signed-off-by: Praveenkumar I <quic_ipkumar@...cinc.com>
> > Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
> > ---
>
> [...]
>
> I think you're reaching out of the BAR register space by an order of magnitude,
> on both hosts
>
> IIUC it's only 32 MiB for both

Checked with h/w person and he confirmed that the BAR register space is correct.
It is 256MB for one and 128MB for the other controller.

> the register addresses/sizes look good

Ok.

Thanks
Varada

> I'm not super glad that we decided to move forward with not putting PARF first,
> as the other registers are in the BAR region, but bindings are bindings and
> bindings are ABI..
>
> Konrad