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Message-ID: <3f31ead7-f342-1d64-edf0-902779613537@loongson.cn>
Date: Wed, 16 Apr 2025 10:29:55 +0800
From: Tianyang Zhang <zhangtianyang@...ngson.cn>
To: Yanteng Si <si.yanteng@...ux.dev>, chenhuacai@...nel.org,
 kernel@...0n.name, corbet@....net, alexs@...nel.org, tglx@...utronix.de,
 jiaxun.yang@...goat.com, peterz@...radead.org, wangliupu@...ngson.cn,
 lvjianmin@...ngson.cn, maobibo@...ngson.cn, siyanteng@...oftware.com.cn,
 gaosong@...ngson.cn, yangtiezhu@...ngson.cn
Cc: loongarch@...ts.linux.dev, linux-doc@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] Docs/LoongArch: Add Advanced Extended-Redirect IRQ
 model description

Hi, Yanteng

在 2025/4/1 上午9:39, Yanteng Si 写道:
>
> 在 3/31/25 2:41 PM, Tianyang Zhang 写道:
>> Introduce the redirect interrupt controllers.When the redirect interrupt
>> controller is enabled, the routing target of MSI interrupts is no 
>> longer a
>> specific CPU and vector number, but a specific redirect entry. The 
>> actual
>> CPU and vector number used are described by the redirect entry.
>>
>> Signed-off-by: Tianyang Zhang <zhangtianyang@...ngson.cn>
>> ---
>>   .../arch/loongarch/irq-chip-model.rst         | 38 +++++++++++++++++++
>>   .../zh_CN/arch/loongarch/irq-chip-model.rst   | 37 ++++++++++++++++++
>>   2 files changed, 75 insertions(+)
>>
>> diff --git a/Documentation/arch/loongarch/irq-chip-model.rst 
>> b/Documentation/arch/loongarch/irq-chip-model.rst
>> index a7ecce11e445..84fafb86ec17 100644
>> --- a/Documentation/arch/loongarch/irq-chip-model.rst
>> +++ b/Documentation/arch/loongarch/irq-chip-model.rst
>> @@ -181,6 +181,44 @@ go to PCH-PIC/PCH-LPC and gathered by EIOINTC, 
>> and then go to CPUINTC directly::
>>                | Devices |
>>                +---------+
>
>> +Advanced Extended IRQ model (with redirection)
>> +===============
>
> Did you do the build test?
If you're referring to the equal sign alignment issue, this is indeed my 
oversight. Thank you for pointing it out.
>
>
>
> Thanks,
>
> Yanteng


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