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Message-Id: <20250416-for-upstream-spd5118-spd-write-prot-detect-v1-0-8b3bcafe9dad@canonical.com>
Date: Wed, 16 Apr 2025 14:46:25 +0800
From: "Yo-Jung (Leo) Lin" <leo.lin@...onical.com>
To: Jean Delvare <jdelvare@...e.com>, Guenter Roeck <linux@...ck-us.net>
Cc: linux-hwmon@...r.kernel.org, linux-kernel@...r.kernel.org, 
 "Yo-Jung Lin (Leo)" <leo.lin@...onical.com>
Subject: [PATCH 0/2] hwmon: (spd5118) adjust sensor behaviors under SPD
 write protection

On some PC platforms, BIOS may enable SPD Write Protection and forbids
writes to certain SMBus addresses. For i801 family those addresses are
0x50 to 0x57 [1], where the spd5118 sensors usually get probed.

One implication is that the driver is not able to sync back values to
the sensor registers cache during resume, leading to resume failure.
Also, sensor functions related to writes are not functional in those
cases. This has been observed on multiple existing PC platforms from
Dell and HP.

This patchset introduces basic mechanism similar to what was done in the
spd5118_init() to detect this, and bypass sensor functions that might
involve writes if this is detected.

[1] 18.1.16 HOSTC—Host Configuration Register (SMBus—D31:F3),
    Intel 8 Series/C220 Series Chipset Family Platform Controller Hub(PCH)

Signed-off-by: Yo-Jung Lin (Leo) <leo.lin@...onical.com>
---
Yo-Jung (Leo) Lin (2):
      hwmon: (spd5118) pass spd5118_data to hwmon callbacks
      hwmon: (spd5118) restrict writes under SPD write protection

 drivers/hwmon/spd5118.c | 41 ++++++++++++++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 5 deletions(-)
---
base-commit: a6d89461ace59cf66bbfecddfdf3433f626ecd7a
change-id: 20250416-for-upstream-spd5118-spd-write-prot-detect-a7e3ba39278c

Best regards,
-- 
Yo-Jung (Leo) Lin <leo.lin@...onical.com>


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