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Message-Id: <20250416-sc7280-fastrpc-dma-v1-1-60ca91116b1e@radxa.com>
Date: Wed, 16 Apr 2025 18:54:18 +0800
From: Xilin Wu <sophon@...xa.com>
To: cros-qcom-dts-watchers@...omium.org,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Xilin Wu <sophon@...xa.com>
Subject: [PATCH] arm64: dts: qcom: sc7280: Mark FastRPC context banks as
dma-coherent
The FastRPC context banks are DMA-coherent on sc7280 platform. Mark them
as such.
This allows LLM inferencing on the CDSP using Qualcomm AI Engine Direct
SDK on the qcs6490 platform.
Signed-off-by: Xilin Wu <sophon@...xa.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index ec96c917b56b4a077b45ac0186da6aaedb899dbe..bb5092bc2bbe97ece31ad84a22f87738b1289682 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3869,18 +3869,21 @@ compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1803 0x0>;
+ dma-coherent;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1804 0x0>;
+ dma-coherent;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1805 0x0>;
+ dma-coherent;
};
};
};
@@ -4108,6 +4111,7 @@ compute-cb@1 {
reg = <1>;
iommus = <&apps_smmu 0x11a1 0x0420>,
<&apps_smmu 0x1181 0x0420>;
+ dma-coherent;
};
compute-cb@2 {
@@ -4115,6 +4119,7 @@ compute-cb@2 {
reg = <2>;
iommus = <&apps_smmu 0x11a2 0x0420>,
<&apps_smmu 0x1182 0x0420>;
+ dma-coherent;
};
compute-cb@3 {
@@ -4122,6 +4127,7 @@ compute-cb@3 {
reg = <3>;
iommus = <&apps_smmu 0x11a3 0x0420>,
<&apps_smmu 0x1183 0x0420>;
+ dma-coherent;
};
compute-cb@4 {
@@ -4129,6 +4135,7 @@ compute-cb@4 {
reg = <4>;
iommus = <&apps_smmu 0x11a4 0x0420>,
<&apps_smmu 0x1184 0x0420>;
+ dma-coherent;
};
compute-cb@5 {
@@ -4136,6 +4143,7 @@ compute-cb@5 {
reg = <5>;
iommus = <&apps_smmu 0x11a5 0x0420>,
<&apps_smmu 0x1185 0x0420>;
+ dma-coherent;
};
compute-cb@6 {
@@ -4143,6 +4151,7 @@ compute-cb@6 {
reg = <6>;
iommus = <&apps_smmu 0x11a6 0x0420>,
<&apps_smmu 0x1186 0x0420>;
+ dma-coherent;
};
compute-cb@7 {
@@ -4150,6 +4159,7 @@ compute-cb@7 {
reg = <7>;
iommus = <&apps_smmu 0x11a7 0x0420>,
<&apps_smmu 0x1187 0x0420>;
+ dma-coherent;
};
compute-cb@8 {
@@ -4157,6 +4167,7 @@ compute-cb@8 {
reg = <8>;
iommus = <&apps_smmu 0x11a8 0x0420>,
<&apps_smmu 0x1188 0x0420>;
+ dma-coherent;
};
/* note: secure cb9 in downstream */
@@ -4166,6 +4177,7 @@ compute-cb@11 {
reg = <11>;
iommus = <&apps_smmu 0x11ab 0x0420>,
<&apps_smmu 0x118b 0x0420>;
+ dma-coherent;
};
compute-cb@12 {
@@ -4173,6 +4185,7 @@ compute-cb@12 {
reg = <12>;
iommus = <&apps_smmu 0x11ac 0x0420>,
<&apps_smmu 0x118c 0x0420>;
+ dma-coherent;
};
compute-cb@13 {
@@ -4180,6 +4193,7 @@ compute-cb@13 {
reg = <13>;
iommus = <&apps_smmu 0x11ad 0x0420>,
<&apps_smmu 0x118d 0x0420>;
+ dma-coherent;
};
compute-cb@14 {
@@ -4187,6 +4201,7 @@ compute-cb@14 {
reg = <14>;
iommus = <&apps_smmu 0x11ae 0x0420>,
<&apps_smmu 0x118e 0x0420>;
+ dma-coherent;
};
};
};
---
base-commit: 5b37f7bfff3b1582c34be8fb23968b226db71ebd
change-id: 20250416-sc7280-fastrpc-dma-88f3471a4113
Best regards,
--
Xilin Wu <sophon@...xa.com>
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