linux-kernel - [PATCH v3 3/6] spi: tegra210-quad: modify chip select (CS) deactivation

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Message-ID: <20250416110606.2737315-4-va@nvidia.com>
Date: Wed, 16 Apr 2025 11:06:03 +0000
From: Vishwaroop A <va@...dia.com>
To: <thierry.reding@...il.com>, <jonathanh@...dia.com>,
	<skomatineni@...dia.com>, <ldewangan@...dia.com>, <broonie@...nel.org>,
	<linux-spi@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <kyarlagadda@...dia.com>,
	<smangipudi@...dia.com>
CC: <va@...dia.com>
Subject: [PATCH v3 3/6] spi: tegra210-quad: modify chip select (CS) deactivation

Modify the chip select (CS) deactivation and inter-transfer delay
execution only during the DATA_TRANSFER phase when the cs_change
flag is not set. This ensures proper CS handling and timing between
transfers while eliminating redundant operations.

Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")
Signed-off-by: Vishwaroop A <va@...dia.com>
---
 drivers/spi/spi-tegra210-quad.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-tegra210-quad.c b/drivers/spi/spi-tegra210-quad.c
index a9359b005ee8..159fbbfd4a38 100644
--- a/drivers/spi/spi-tegra210-quad.c
+++ b/drivers/spi/spi-tegra210-quad.c
@@ -1159,16 +1159,16 @@ static int tegra_qspi_combined_seq_xfer(struct tegra_qspi *tqspi,
 				ret = -EIO;
 				goto exit;
 			}
-			if (!xfer->cs_change) {
-				tegra_qspi_transfer_end(spi);
-				spi_transfer_delay_exec(xfer);
-			}
 			break;
 		default:
 			ret = -EINVAL;
 			goto exit;
 		}
 		msg->actual_length += xfer->len;
+		if (!xfer->cs_change && transfer_phase == DATA_TRANSFER) {
+			tegra_qspi_transfer_end(spi);
+			spi_transfer_delay_exec(xfer);
+		}
 		transfer_phase++;
 	}
 	ret = 0;
-- 
2.17.1