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Message-ID: <3de64545-6247-4aaf-b1af-c9d5fe038eaa@linux.microsoft.com>
Date: Tue, 15 Apr 2025 17:05:11 -0700
From: Vijay Balakrishna <vijayb@...ux.microsoft.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Tony Luck <tony.luck@...el.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, James Morse <james.morse@....com>,
Mauro Carvalho Chehab <mchehab@...nel.org>, Robert Richter
<rric@...nel.org>, linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
Tyler Hicks <code@...icks.com>, Marc Zyngier <maz@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [v7 PATCH 0/2] Add L1 and L2 error detection for A53, A57 and A72
On 4/13/25 13:39, Borislav Petkov wrote:
> On Fri, Apr 11, 2025 at 03:08:37PM -0700, Vijay Balakrishna wrote:
>> Hello,
>>
>> This is an attempt to revive [v5] series. I have attempted to address comments
>> and suggestions from Marc Zyngier since [v5]. Additionally, I have extended
>> support for A72 processors. Testing on a problematic A72 SoC has led to the
>> detection of Correctable Errors (CEs). I am eager to hear your suggestions and
>> feedback on this series.
>
> Did you not read Marc's note:
>
> https://lore.kernel.org/all/86a58kl51r.wl-maz@kernel.org/
>
> or
>
> https://lore.kernel.org/all/86frigkmtd.wl-maz@kernel.org/
>
> ?
>
Hi Borislav,
I did see the second reply above, but not the first before posting v7. I
opted to submit v7 after addressing the comments and issues identified
in v6 for the benefit of those interested. Sascha's v5 series has helped
us in confirming a problematic A72 indeed suffering from CEs.
Our primary focus is on A72. I can re-submit with modifications solely
related to A72 and exclude A53 and A57. As Tyler mentioned, we have a
significant number of A72-based systems in our fleet, and timely
replacements via monitoring CEs will be instrumental in managing them
effectively. Please share your thoughts.
Thanks,
Vijay
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