linux-kernel - Re: [PATCH 1/1] PCI: Restore assigned resources fully after release

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Message-ID: <3578030.5fSG56mABF@workhorse>
Date: Thu, 17 Apr 2025 16:49:13 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Guenter Roeck <linux@...ck-us.net>, Bjorn Helgaas <bhelgaas@...gle.com>,
 Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
 linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
 Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: Igor Mammedov <imammedo@...hat.com>,
 Mika Westerberg <mika.westerberg@...ux.intel.com>,
 Michał Winiarski <michal.winiarski@...el.com>,
 linux-rockchip@...ts.infradead.org,
 Ondřej Jirman <megi@....cz>,
 Niklas Cassel <cassel@...nel.org>
Subject: Re: [PATCH 1/1] PCI: Restore assigned resources fully after release

On Thursday, 3 April 2025 11:31:37 Central European Summer Time Ilpo Järvinen wrote:
> PCI resource fitting code in __assign_resources_sorted() runs in
> multiple steps. A resource that was successfully assigned may have to
> be released before the next step attempts assignment again. The
> assign+release cycle is destructive to a start-aligned struct resource
> (bridge window or IOV resource) because the start field is overwritten
> with the real address when the resource got assigned.
> 
> Properly restore the resource after releasing it. The start, end, and
> flags fields must be stored into the related struct pci_dev_resource in
> order to be able to restore the resource to its original state.
> 
> Reported-by: Guenter Roeck <linux@...ck-us.net>
> Fixes: 96336ec70264 ("PCI: Perform reset_resource() and build fail list in sync")
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
> ---
>  drivers/pci/setup-bus.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 

+Cc: linux-rockchip

Tested-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>

This fixes a regression on the RK3588 that I ran into with v6.15-rc<=2.

Specifically, the PCIe3 controller will fail to map the address space
of a
  Non-Volatile memory controller: KIOXIA Corporation NVMe SSD (rev 01)
  (prog-if 02 [NVM Express])

drive on most, but not all, boots, depending on the order initialisation
happens, it seems. A different drive I tested seems to work fine, so not
only does the regression only rear its head based on boot timing, but
also based on the device attached to the PCIe3 controller. Bisecting was
a bit of a tortured affair, as the bad commit 96336ec70264 doesn't seem
to build for me, so I had to `git bisect skip` it.

The specific problematic behaviour fixed by this patch is that we get:

  pci 0000:00:00.0: bridge window [mem size 0x00100000]: can't assign; bogus alignment

It sounds like Ondřej Jirman ran into the same regression, since the
devices he mentioned (Orange Pi 5+ and QuartzPro64) both use the
Rockchip RK3588 SoC.

Kind regards,
Nicolas Frattaroli