linux-kernel - Re: [PATCH v3 01/10] gpiolib: add support to register sparse pin range

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Message-ID: <aAEyXxgcU4wN3QXK@smile.fi.intel.com>
Date: Thu, 17 Apr 2025 19:54:55 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
	thomas.petazzoni@...tlin.com, DanieleCleri@...on.eu,
	GaryWang@...on.com.tw
Subject: Re: [PATCH v3 01/10] gpiolib: add support to register sparse pin
 range

On Wed, Apr 16, 2025 at 04:08:09PM +0200, Thomas Richard wrote:
> Add support to register for GPIO<->pin mapping using a list of non
> consecutive pins. The core already support sparse pin range (pins member
> of struct pinctrl_gpio_range), but it was not possible to register one. If
> pins is not NULL the core uses it, otherwise it assumes that a consecutive
> pin range was registered and it uses pin_base.
> 
> The function gpiochip_add_pin_range() which allocates and fill the struct
> pinctrl_gpio_range was renamed to gpiochip_add_pin_range_with_pins() and
> the pins parameter was added.
> 
> Two new functions were added, gpiochip_add_pin_range() and
> gpiochip_add_sparse_pin_range() to register a consecutive or sparse pins
> range. Both use gpiochip_add_pin_range_with_pins().

...

> +	if (!pin_range->range.pins)

This change looks pretty nice, but can we use positive conditonal?

> +		chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
> +			 gpio_offset, gpio_offset + npins - 1,
> +			 pinctl_name,
> +			 pin_offset, pin_offset + npins - 1);
> +	else
> +		chip_dbg(gc, "created GPIO range %d->%d ==> %s %d sparse PIN range { %d, ... }",
> +			 gpio_offset, gpio_offset + npins - 1,
> +			 pinctl_name, npins, pins[0]);

With that done,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

-- 
With Best Regards,
Andy Shevchenko