linux-kernel - Re: [PATCH v3 01/10] gpiolib: add support to register sparse pin range

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Message-ID: <CACRpkdaqw8o80=coMHv6esa-fVQHc408_==7iaBd3M0VFazEGA@mail.gmail.com>
Date: Thu, 17 Apr 2025 09:51:11 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Bartosz Golaszewski <brgl@...ev.pl>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, linux-gpio@...r.kernel.org, 
	linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com, 
	DanieleCleri@...on.eu, GaryWang@...on.com.tw
Subject: Re: [PATCH v3 01/10] gpiolib: add support to register sparse pin range

On Wed, Apr 16, 2025 at 4:00 PM Thomas Richard
<thomas.richard@...tlin.com> wrote:

> Add support to register for GPIO<->pin mapping using a list of non
> consecutive pins. The core already support sparse pin range (pins member
> of struct pinctrl_gpio_range), but it was not possible to register one. If
> pins is not NULL the core uses it, otherwise it assumes that a consecutive
> pin range was registered and it uses pin_base.
>
> The function gpiochip_add_pin_range() which allocates and fill the struct
> pinctrl_gpio_range was renamed to gpiochip_add_pin_range_with_pins() and
> the pins parameter was added.
>
> Two new functions were added, gpiochip_add_pin_range() and
> gpiochip_add_sparse_pin_range() to register a consecutive or sparse pins
> range. Both use gpiochip_add_pin_range_with_pins().
>
> Signed-off-by: Thomas Richard <thomas.richard@...tlin.com>

This looks correct, useful API and nice naming too!
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij