linux-kernel - Re: [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CACRpkdYo8bHYKdkFLLqkCTZzy44pk=xPri=E3ogXP=BiywL9zQ@mail.gmail.com>
Date: Thu, 17 Apr 2025 09:53:16 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Bartosz Golaszewski <brgl@...ev.pl>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, linux-gpio@...r.kernel.org, 
	linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com, 
	DanieleCleri@...on.eu, GaryWang@...on.com.tw
Subject: Re: [PATCH v3 00/10] Add pinctrl support for the AAEON UP board FPGA

On Wed, Apr 16, 2025 at 4:00 PM Thomas Richard
<thomas.richard@...tlin.com> wrote:

> This is the third version of this series (rebased on v6.15-rc2).
>
> The gpiolib part has been reworked, the gpiochip_add_pin_range() was
> renamed to gpiochip_add_pin_range_with_pins() and a new pins parameter was
> addded. Two stubs were created to add consecutive or sparse pin range.
>
> For the forwarder library, a namespace was added and patches were splitted
> to more simpler changes.
>
> In the pinctrl core, the function devm_pinctrl_register_mappings() was
> created.
>
> No big changes in the upboard pinctrl driver, only few fixes and
> improvements.
>
> Signed-off-by: Thomas Richard <thomas.richard@...tlin.com>

>From a pin control view this looks fine, I expect the whole thing
to be merged into the GPIO tree, so I'll just ACK the pinctrl
patches.

Yours,
Linus Walleij