linux-kernel - RE: [PATCH 1/3] clocksource/drivers/timer-tegra186: add WDIOC

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Message-ID:
 <PH7PR12MB6418D7F4AAE03AAB0600187FD9BC2@PH7PR12MB6418.namprd12.prod.outlook.com>
Date: Thu, 17 Apr 2025 09:43:40 +0000
From: Robert Lin <robelin@...dia.com>
To: "thierry.reding@...il.com" <thierry.reding@...il.com>,
	"daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>, Jon Hunter
	<jonathanh@...dia.com>, "tglx@...utronix.de" <tglx@...utronix.de>, Pohsun Su
	<pohsuns@...dia.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>, Sumit Gupta
	<sumitg@...dia.com>
Subject: RE: [PATCH 1/3] clocksource/drivers/timer-tegra186: add
 WDIOC_GETTIMELEFT support

> -----Original Message-----
> From: Robert Lin <robelin@...dia.com>
> Sent: Thursday, April 17, 2025 5:28 PM
> To: thierry.reding@...il.com; daniel.lezcano@...aro.org; Jon Hunter
> <jonathanh@...dia.com>; tglx@...utronix.de; Pohsun Su
> <pohsuns@...dia.com>
> Cc: linux-kernel@...r.kernel.org; linux-tegra@...r.kernel.org; Sumit Gupta
> <sumitg@...dia.com>; Robert Lin <robelin@...dia.com>
> Subject: [PATCH 1/3] clocksource/drivers/timer-tegra186: add
> WDIOC_GETTIMELEFT support
> 
> From: Pohsun Su <pohsuns@...dia.com>
> 
> This change adds support for WDIOC_GETTIMELEFT so userspace programs
> can get the number of seconds before system reset by the watchdog timer via
> ioctl.
> 
> Signed-off-by: Pohsun Su <pohsuns@...dia.com>
> Signed-off-by: Robert Lin <robelin@...dia.com>
> ---
>  drivers/clocksource/timer-tegra186.c | 56
> +++++++++++++++++++++++++++-
>  1 file changed, 55 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-
> tegra186.c
> index ea742889ee06..201b24ca59f4 100644
> --- a/drivers/clocksource/timer-tegra186.c
> +++ b/drivers/clocksource/timer-tegra186.c
> @@ -1,8 +1,9 @@
>  // SPDX-License-Identifier: GPL-2.0-only
>  /*
> - * Copyright (c) 2019-2020 NVIDIA Corporation. All rights reserved.
> + * Copyright (c) 2019-2025 NVIDIA Corporation. All rights reserved.
>   */
> 
> +#include <linux/bitfield.h>
>  #include <linux/clocksource.h>
>  #include <linux/module.h>
>  #include <linux/interrupt.h>
> @@ -30,6 +31,7 @@
> 
>  #define TMRSR 0x004
>  #define  TMRSR_INTR_CLR BIT(30)
> +#define  TMRSR_PCV GENMASK(28, 0)
> 
>  #define TMRCSSR 0x008
>  #define  TMRCSSR_SRC_USEC (0 << 0)
> @@ -46,6 +48,9 @@
>  #define  WDTCR_TIMER_SOURCE_MASK 0xf
>  #define  WDTCR_TIMER_SOURCE(x) ((x) & 0xf)
> 
> +#define WDTSR 0x004
> +#define  WDTSR_CURRENT_EXPIRATION_COUNT GENMASK(14, 12)
> +
>  #define WDTCMDR 0x008
>  #define  WDTCMDR_DISABLE_COUNTER BIT(1)  #define
> WDTCMDR_START_COUNTER BIT(0) @@ -235,12 +240,61 @@ static int
> tegra186_wdt_set_timeout(struct watchdog_device *wdd,
>  	return 0;
>  }
> 
> +static unsigned int tegra186_wdt_get_timeleft(struct watchdog_device
> +*wdd) {
> +	struct tegra186_wdt *wdt = to_tegra186_wdt(wdd);
> +	u32 timeleft, expiration, val;
> +
> +	if (!watchdog_active(&wdt->base)) {
> +		/* return zero if the watchdog timer is not activated. */
> +		return 0;
> +	}
> +
> +	/*
> +	 * Reset occurs on the fifth expiration of the
> +	 * watchdog timer and so when the watchdog timer is configured,
> +	 * the actual value programmed into the counter is 1/5 of the
> +	 * timeout value. Once the counter reaches 0, expiration count
> +	 * will be increased by 1 and the down counter restarts.
> +	 * Hence to get the time left before system reset we must
> +	 * combine 2 parts:
> +	 * 1. value of the current down counter
> +	 * 2. (number of counter expirations remaining) * (timeout/5)
> +	 */
> +
> +	/* Get the current number of counter expirations. Should be a
> +	 * value between 0 and 4
> +	 */
> +	val = readl_relaxed(wdt->regs + WDTSR);
> +	expiration = FIELD_GET(WDTSR_CURRENT_EXPIRATION_COUNT, val);
> +
> +	/* Get the current counter value in microsecond.
> +	 */
> +	val = readl_relaxed(wdt->tmr->regs + TMRSR);
> +	timeleft = FIELD_GET(TMRSR_PCV, val);
> +
> +	/*
> +	 * Calculate the time remaining by adding the time for the
> +	 * counter value to the time of the counter expirations that
> +	 * remain. Do the multiplication first on purpose just to keep
> +	 * the precision due to the integer division.
> +	 */
> +	timeleft += wdt->base.timeout * (4 - expiration) / 5;
> +	/*
> +	 * Convert the current counter value to seconds,
> +	 * rounding up to the nearest second.
> +	 */
> +	timeleft = (timeleft + USEC_PER_SEC / 2) / USEC_PER_SEC;
> +	return timeleft;
> +}
> +
>  static const struct watchdog_ops tegra186_wdt_ops = {
>  	.owner = THIS_MODULE,
>  	.start = tegra186_wdt_start,
>  	.stop = tegra186_wdt_stop,
>  	.ping = tegra186_wdt_ping,
>  	.set_timeout = tegra186_wdt_set_timeout,
> +	.get_timeleft = tegra186_wdt_get_timeleft,
>  };
> 
>  static struct tegra186_wdt *tegra186_wdt_create(struct tegra186_timer
> *tegra,
> --
> 2.34.1

Sorry for the spam. My automation script has some issue to submit the wrong patch series. Please ignore these emails and move on to the next patch v4 series: https://lore.kernel.org/lkml/20250417093110.2751877-1-robelin@nvidia.com/T/#t

Let me know if this cause trouble and I'll need to submit a V5 patch instead, I apology for the mess.

All the best,
Robert Lin