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Message-Id: <20250418053239.4351-12-cyan.yang@sifive.com>
Date: Fri, 18 Apr 2025 13:32:38 +0800
From: Cyan Yang <cyan.yang@...ive.com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
corbet@....net,
paul.walmsley@...ive.com,
palmer@...belt.com,
aou@...s.berkeley.edu,
alex@...ti.fr,
samuel.holland@...ive.com
Cc: linux-doc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Cyan Yang <cyan.yang@...ive.com>
Subject: [PATCH 11/12] riscv: hwprobe: Document SiFive xsfvfwmaccqqq vendor extension
Document the support for matrix multiply accumulate instruction
from SiFive using RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ.
Signed-off-by: Cyan Yang <cyan.yang@...ive.com>
---
Documentation/arch/riscv/hwprobe.rst | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index e15405e12239..7c11351b1383 100644
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -353,3 +353,7 @@ The following keys are defined:
* :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFNRCLIPXFQF`: The Xsfvfnrclipxfqf
vendor extension is supported in version 1.0 of SiFive FP32-to-int8 Ranged
Clip Instructions Extensions Specification.
+
+ * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ`: The Xsfvfwmaccqqq
+ vendor extension is supported in version 1.0 of Matrix Multiply Accumulate
+ Instruction Extensions Specification.
\ No newline at end of file
--
2.39.5 (Apple Git-154)
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