Message-ID: <aAJtwxBtBX4ofy/o@lizhi-Precision-Tower-5810>
Date: Fri, 18 Apr 2025 11:20:35 -0400
From: Frank Li <Frank.li@....com>
To: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>,
	Zhang Rui <rui.zhang@...el.com>, Lukasz Luba <lukasz.luba@....com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Pengfei Li <pengfei.li_1@....com>,
	Marco Felsch <m.felsch@...gutronix.de>, linux-pm@...r.kernel.org,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	ye.li@....com, joy.zou@....com, Peng Fan <peng.fan@....com>
Subject: Re: [PATCH RESEND v6 2/2] thermal: imx91: Add support for i.MX91
 thermal monitoring unit

On Fri, Apr 18, 2025 at 12:05:52PM +0200, Daniel Lezcano wrote:
> On Mon, Apr 07, 2025 at 04:05:40PM -0400, Frank Li wrote:
> > From: Pengfei Li <pengfei.li_1@....com>
> >
> > Introduce support for the i.MX91 thermal monitoring unit, which features a
> > single sensor for the CPU. The register layout differs from other chips,
> > necessitating the creation of a dedicated file for this.
> >
> > This sensor provides a resolution of 1/64°C (6-bit fraction). For actual
> > accuracy, refer to the datasheet, as it varies depending on the chip grade.
> > Provide an interrupt for end of measurement and threshold violation and
> > Contain temperature threshold comparators, in normal and secure address
> > space, with direction and threshold programmability.
> >
> > Datasheet Link: https://www.nxp.com/docs/en/data-sheet/IMX91CEC.pdf
> >
> > Signed-off-by: Pengfei Li <pengfei.li_1@....com>
> > Signed-off-by: Peng Fan <peng.fan@....com>
> > Signed-off-by: Frank Li <Frank.Li@....com>
> > ---
> > Change from v5 to v6
> > - remove Macro's review tag
> > - remove mutex lock
> > - use set_trips callback
> >
> > Change from v4 to v5
> > - add irq support
> > - use period mode
> > - Marco, if need drop review tag, let me know
> >
> > Change from v3 to v4
> > - Add Macro's review tag
> > - Use devm_add_action()
> > - Move pm_runtim_put before thermal_of_zone_register()
> >
> > change from v2 to v3
> > - add IMX91_TMU_ prefix for register define
> > - remove unused register define
> > - fix missed pm_runtime_put() at error path in imx91_tmu_get_temp()
> > - use dev variable in probe function
> > - use pm_runtime_set_active() in probe
> > - move START to imx91_tmu_get_temp()
> > - use DEFINE_RUNTIME_DEV_PM_OPS()
> > - keep set reset value because there are not sw "reset" bit in controller,
> > uboot may change and enable tmu.
> >
> > change from v1 to v2
> > - use low case for hexvalue
> > - combine struct imx91_tmu and tmu_sensor
> > - simplify imx91_tmu_start() and imx91_tmu_enable()
> > - use s16 for imx91_tmu_get_temp(), which may negative value
> > - use reverse christmas tree style
> > - use run time pm
> > - use oneshot to sample temp
> > - register thermal zone after hardware init
> > ---
> >  drivers/thermal/Kconfig         |  10 +
> >  drivers/thermal/Makefile        |   1 +
> >  drivers/thermal/imx91_thermal.c | 398 ++++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 409 insertions(+)
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index d3f9686e26e71..78a05d1030882 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -296,6 +296,16 @@ config IMX8MM_THERMAL
> >  	  cpufreq is used as the cooling device to throttle CPUs when the passive
> >  	  trip is crossed.
> >
> > +config IMX91_THERMAL
> > +	tristate "Temperature sensor driver for NXP i.MX91 SoC"
> > +	depends on ARCH_MXC || COMPILE_TEST
> > +	depends on OF
> > +	help
> > +	  Include one sensor and six comparators. Each of them compares the
> > +	  temperature value (from the sensor) against the programmable
> > +	  threshold values. The direction of the comparison is configurable
> > +	  (greater / lesser than).
> > +
> >  config K3_THERMAL
> >  	tristate "Texas Instruments K3 thermal support"
> >  	depends on ARCH_K3 || COMPILE_TEST
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 9abf43a74f2bb..08da241e6a598 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -50,6 +50,7 @@ obj-$(CONFIG_ARMADA_THERMAL)	+= armada_thermal.o
> >  obj-$(CONFIG_IMX_THERMAL)	+= imx_thermal.o
> >  obj-$(CONFIG_IMX_SC_THERMAL)	+= imx_sc_thermal.o
> >  obj-$(CONFIG_IMX8MM_THERMAL)	+= imx8mm_thermal.o
> > +obj-$(CONFIG_IMX91_THERMAL)	+= imx91_thermal.o
> >  obj-$(CONFIG_MAX77620_THERMAL)	+= max77620_thermal.o
> >  obj-$(CONFIG_QORIQ_THERMAL)	+= qoriq_thermal.o
> >  obj-$(CONFIG_DA9062_THERMAL)	+= da9062-thermal.o
> > diff --git a/drivers/thermal/imx91_thermal.c b/drivers/thermal/imx91_thermal.c
> > new file mode 100644
> > index 0000000000000..e8deb0b07dc98
> > --- /dev/null
> > +++ b/drivers/thermal/imx91_thermal.c
> > @@ -0,0 +1,398 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2025 NXP.
> > + */
> > +
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/iopoll.h>
> > +#include <linux/nvmem-consumer.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_runtime.h>
> > +#include <linux/thermal.h>
> > +#include <linux/units.h>
> > +
> > +#define REG_SET					0x4
> > +#define REG_CLR					0x8
> > +#define REG_TOG					0xc
> > +
> > +#define IMX91_TMU_CTRL0				0x0
> > +#define   IMX91_TMU_CTRL0_THR1_IE		BIT(9)
> > +#define   IMX91_TMU_CTRL0_THR1_MASK		GENMASK(3, 2)
> > +#define   IMX91_TMU_CTRL0_CLR_FLT1		BIT(21)
> > +
> > +#define IMX91_TMU_THR_MODE_LE			0
> > +#define IMX91_TMU_THR_MODE_GE			1
> > +
> > +#define IMX91_TMU_STAT0				0x10
> > +#define   IMX91_TMU_STAT0_THR1_IF		BIT(9)
> > +#define   IMX91_TMU_STAT0_THR1_STAT		BIT(13)
> > +#define   IMX91_TMU_STAT0_DRDY0_IF_MASK		BIT(16)
> > +
> > +#define IMX91_TMU_DATA0				0x20
> > +
> > +#define IMX91_TMU_CTRL1				0x200
> > +#define IMX91_TMU_CTRL1_EN			BIT(31)
> > +#define IMX91_TMU_CTRL1_START			BIT(30)
> > +#define IMX91_TMU_CTRL1_STOP			BIT(29)
> > +#define IMX91_TMU_CTRL1_RES_MASK		GENMASK(19, 18)
> > +#define IMX91_TMU_CTRL1_MEAS_MODE_MASK		GENMASK(25, 24)
> > +#define   IMX91_TMU_CTRL1_MEAS_MODE_SINGLE	0
> > +#define   IMX91_TMU_CTRL1_MEAS_MODE_CONTINUES	1
> > +#define   IMX91_TMU_CTRL1_MEAS_MODE_PERIODIC	2
> > +
> > +#define IMX91_TMU_THR_CTRL01			0x30
> > +#define   IMX91_TMU_THR_CTRL01_THR1_MASK	GENMASK(31, 16)
> > +
> > +#define IMX91_TMU_REF_DIV			0x280
> > +#define IMX91_TMU_DIV_EN			BIT(31)
> > +#define IMX91_TMU_DIV_MASK			GENMASK(23, 16)
> > +#define IMX91_TMU_DIV_MAX			255
> > +
> > +#define IMX91_TMU_PUD_ST_CTRL			0x2b0
> > +#define IMX91_TMU_PUDL_MASK			GENMASK(23, 16)
> > +
> > +#define IMX91_TMU_TRIM1				0x2e0
> > +#define IMX91_TMU_TRIM2				0x2f0
> > +
> > +#define IMX91_TMU_TEMP_LOW_LIMIT		-40000
> > +#define IMX91_TMU_TEMP_HIGH_LIMIT		125000
> > +
> > +#define IMX91_TMU_DEFAULT_TRIM1_CONFIG		0xb561bc2d
> > +#define IMX91_TMU_DEFAULT_TRIM2_CONFIG		0x65d4
> > +
> > +#define IMX91_TMU_PERIOD_CTRL			0x270
> > +#define   IMX91_TMU_PERIOD_CTRL_MEAS_MASK	GENMASK(23, 0)
> > +
> > +#define IMX91_TMP_FRAC				64
> > +
> > +struct imx91_tmu {
> > +	void __iomem *base;
> > +	struct clk *clk;
> > +	struct device *dev;
> > +	struct thermal_zone_device *tzd;
> > +	int high;
> > +	bool enable;
> > +};
> > +
> > +static void imx91_tmu_start(struct imx91_tmu *tmu, bool start)
> > +{
> > +	u32 val = start ? IMX91_TMU_CTRL1_START : IMX91_TMU_CTRL1_STOP;
> > +
> > +	writel_relaxed(val, tmu->base + IMX91_TMU_CTRL1 + REG_SET);
> > +}
> > +
> > +static void imx91_tmu_enable(struct imx91_tmu *tmu, bool enable)
> > +{
> > +	u32 reg = IMX91_TMU_CTRL1;
> > +
> > +	reg += enable ? REG_SET : REG_CLR;
> > +
> > +	writel_relaxed(IMX91_TMU_CTRL1_EN, tmu->base + reg);
> > +}
> > +
> > +static int imx91_tmu_to_mcelsius(int x)
> > +{
> > +	return x * MILLIDEGREE_PER_DEGREE / IMX91_TMP_FRAC;
> > +}
> > +
> > +static int imx91_tmu_from_mcelsius(int x)
> > +{
> > +	return x * IMX91_TMP_FRAC / MILLIDEGREE_PER_DEGREE;
> > +}
> > +
> > +static int imx91_tmu_get_temp(struct thermal_zone_device *tz, int *temp)
> > +{
> > +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> > +	s16 data;
> > +	int ret;
> > +
> > +	ret = pm_runtime_resume_and_get(tmu->dev);
> > +	if (ret < 0)
> > +		return ret;
>
> Why using pm_runtime* all over the place ?
>
> It would make sense to have in the probe/remove functions (or in the set_mode -
> enabled / disabled), suspend / resume but the other place it does not make
> sense IMO. If the sensor is enabled by the set_mode function and then
> pm_runtime_get() is called, then the ref is taken during all the time the
> sensor is in use, so others pm_runtime_get / pm_runtime_put will be helpless,
> no ?
>
>
> > +	/* DATA0 is 16bit signed number */
> > +	data = readw_relaxed(tmu->base + IMX91_TMU_DATA0);
> > +	*temp = imx91_tmu_to_mcelsius(data);
> > +	if (*temp < IMX91_TMU_TEMP_LOW_LIMIT || *temp > IMX91_TMU_TEMP_HIGH_LIMIT)
> > +		ret = -EAGAIN;
>
> When the measured temperature can be out of limits ?

It is safety check. It may be caused by incorrect calibration data or some
glitch at ref voltage.

>
> > +	if (*temp <= tmu->high && tmu->enable) {
>
> I suggest to provide a change in the thermal core to return -EAGAIN if the
> thermal zone is not enabled when calling thermal_zone_get_temp() and get rid of the tmu->enable
>
> > +		writel_relaxed(IMX91_TMU_STAT0_THR1_IF, tmu->base + IMX91_TMU_STAT0 + REG_CLR);
> > +		writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_SET);
> > +	}
>
> For my understanding what are for these REG_CLR and REG_SET in this function?

REG_CLR\REG_SET is offset 8\4 for each register, which used clear\set only
some bits without touch other value

	SET register work as

	val = readl(reg);
	val |= mask;
        writel (val, reg);

the benenfit of use CLR/SET register make code simple and it is atomic change
one bit.

>
> > +	pm_runtime_put(tmu->dev);
> > +
> > +	return ret;
> > +}
> > +
> > +static int imx91_tmu_set_trips(struct thermal_zone_device *tz, int low, int high)
> > +{
> > +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> > +	int val;
> > +	int ret;
> > +
> > +	ret = pm_runtime_resume_and_get(tmu->dev);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	if (high >= IMX91_TMU_TEMP_HIGH_LIMIT)
> > +		return -EINVAL;
> > +
> > +	writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_CLR);
> > +
> > +	/* Comparator1 for temperature threshold */
> > +	writel_relaxed(IMX91_TMU_THR_CTRL01_THR1_MASK, tmu->base + IMX91_TMU_THR_CTRL01 + REG_CLR);
> > +	val = FIELD_PREP(IMX91_TMU_THR_CTRL01_THR1_MASK, imx91_tmu_from_mcelsius(high));
> > +	writel_relaxed(val, tmu->base + IMX91_TMU_THR_CTRL01 + REG_SET);
> > +
> > +	writel_relaxed(IMX91_TMU_STAT0_THR1_IF, tmu->base + IMX91_TMU_STAT0 + REG_CLR);
> > +
> > +	tmu->high = high;
>
> Why is 'high' needed?

Need re-enable irq when tempture below high.

Frank
>
> > +
> > +	writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_SET);
> > +	pm_runtime_put(tmu->dev);
> > +
> > +	return 0;
> > +}
> > +
> > +static int imx91_init_from_nvmem_cells(struct imx91_tmu *tmu)
> > +{
> > +	struct device *dev = tmu->dev;
> > +	u32 trim1, trim2;
> > +	int ret;
> > +
> > +	ret = nvmem_cell_read_u32(dev, "trim1", &trim1);
> > +	if (ret)
> > +		return ret;
> > +
> > +	ret = nvmem_cell_read_u32(dev, "trim2", &trim2);
> > +	if (ret)
> > +		return ret;
> > +
> > +	if (trim1 == 0 || trim2 == 0)
> > +		return -EINVAL;
> > +
> > +	writel_relaxed(trim1, tmu->base + IMX91_TMU_TRIM1);
> > +	writel_relaxed(trim2, tmu->base + IMX91_TMU_TRIM2);
> > +
> > +	return 0;
> > +}
> > +
> > +static void imx91_tmu_action_remove(void *data)
> > +{
> > +	struct imx91_tmu *tmu = data;
> > +
> > +	/* disable tmu */
> > +	imx91_tmu_enable(tmu, false);
> > +}
> > +
> > +static irqreturn_t imx91_tmu_alarm_irq_thread(int irq, void *dev)
> > +{
> > +	struct imx91_tmu *tmu = dev;
> > +	int val;
> > +	int ret;
> > +
> > +	ret = pm_runtime_resume_and_get(tmu->dev);
> > +	if (ret < 0)
> > +		return ret;
> > +
> > +	thermal_zone_device_update(tmu->tzd, THERMAL_EVENT_UNSPECIFIED);
>
> Ack the IRQ before calling thermal_zone_device_update()
>
> > +	val = readl_relaxed(tmu->base + IMX91_TMU_STAT0);
>
> One blank line to let the code breath
>
> > +	/* Have to use CLR register to clean up w1c bits */
> > +	writel_relaxed(val, tmu->base + IMX91_TMU_STAT0 + REG_CLR);
> > +
> > +	writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_CLR);
> > +
> > +	pm_runtime_put(tmu->dev);
> > +
> > +	return IRQ_HANDLED;
> > +}
> > +
> > +static int imx91_tmu_change_mode(struct thermal_zone_device *tz, enum thermal_device_mode mode)
> > +{
> > +	struct imx91_tmu *tmu = thermal_zone_device_priv(tz);
> > +	int ret;
> > +
> > +	if (mode == THERMAL_DEVICE_ENABLED) {
> > +		ret = pm_runtime_get(tmu->dev);
> > +		if (ret < 0)
> > +			return ret;
> > +
> > +		imx91_tmu_start(tmu, true);
> > +		writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_SET);
> > +		tmu->enable = true;
> > +	} else {
> > +		writel_relaxed(IMX91_TMU_CTRL0_THR1_IE, tmu->base + IMX91_TMU_CTRL0 + REG_CLR);
> > +		imx91_tmu_start(tmu, false);
> > +		pm_runtime_put(tmu->dev);
> > +		tmu->enable = false;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static struct thermal_zone_device_ops tmu_tz_ops = {
> > +	.get_temp = imx91_tmu_get_temp,
> > +	.change_mode = imx91_tmu_change_mode,
> > +	.set_trips = imx91_tmu_set_trips,
> > +};
> > +
>
> [ ... ]

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