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Message-Id: <20250418155615.79C12364@davehans-spike.ostc.intel.com>
Date: Fri, 18 Apr 2025 08:56:15 -0700
From: Dave Hansen <dave.hansen@...ux.intel.com>
To: linux-kernel@...r.kernel.org
Cc: x86@...nel.org,tglx@...utronix.de,bp@...en8.de,joro@...tes.org,luto@...nel.org,peterz@...radead.org,kirill.shutemov@...ux.intel.com,rick.p.edgecombe@...el.com,jgross@...e.com,Dave Hansen <dave.hansen@...ux.intel.com>
Subject: [PATCH 2/2] x86/mm: Move duplicated 32-bit page table sync mask to common code


From: Dave Hansen <dave.hansen@...ux.intel.com>

The vmalloc() code needs to know when to propagate changes to across
mms because the rules differ based on architecture and kernel config.
It does this with a bitmap: ARCH_PAGE_TABLE_SYNC_MASK which tells
vmalloc when to call back in to arch-specific code to propagate
page table changes.

The 32-bit x86 rules are less exciting now and are unified across
PAE (3-level) and 2-level paging so the two for their constants
define the same value.

Move the common value to the common pgtable_32_types.h.

Suggested-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
---

 b/arch/x86/include/asm/pgtable-2level_types.h |    2 --
 b/arch/x86/include/asm/pgtable-3level_types.h |    2 --
 b/arch/x86/include/asm/pgtable_32_types.h     |    2 ++
 3 files changed, 2 insertions(+), 4 deletions(-)

diff -puN arch/x86/include/asm/pgtable-2level_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK arch/x86/include/asm/pgtable-2level_types.h
--- a/arch/x86/include/asm/pgtable-2level_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK	2025-04-18 08:37:32.631950373 -0700
+++ b/arch/x86/include/asm/pgtable-2level_types.h	2025-04-18 08:37:32.640950703 -0700
@@ -18,8 +18,6 @@ typedef union {
 } pte_t;
 #endif	/* !__ASSEMBLER__ */
 
-#define ARCH_PAGE_TABLE_SYNC_MASK	PGTBL_PMD_MODIFIED
-
 /*
  * Traditional i386 two-level paging structure:
  */
diff -puN arch/x86/include/asm/pgtable_32_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK arch/x86/include/asm/pgtable_32_types.h
--- a/arch/x86/include/asm/pgtable_32_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK	2025-04-18 08:37:32.635950520 -0700
+++ b/arch/x86/include/asm/pgtable_32_types.h	2025-04-18 08:37:32.640950703 -0700
@@ -20,4 +20,6 @@
 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
 #define PGDIR_MASK	(~(PGDIR_SIZE - 1))
 
+#define ARCH_PAGE_TABLE_SYNC_MASK	PGTBL_PMD_MODIFIED
+
 #endif /* _ASM_X86_PGTABLE_32_TYPES_H */
diff -puN arch/x86/include/asm/pgtable-3level_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK arch/x86/include/asm/pgtable-3level_types.h
--- a/arch/x86/include/asm/pgtable-3level_types.h~move-ARCH_PAGE_TABLE_SYNC_MASK	2025-04-18 08:37:32.637950593 -0700
+++ b/arch/x86/include/asm/pgtable-3level_types.h	2025-04-18 08:37:32.640950703 -0700
@@ -27,8 +27,6 @@ typedef union {
 } pmd_t;
 #endif	/* !__ASSEMBLER__ */
 
-#define ARCH_PAGE_TABLE_SYNC_MASK	PGTBL_PMD_MODIFIED
-
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
  */
_

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