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Message-Id: <20250419080001.16514-1-amadeus@jmu.edu.cn>
Date: Sat, 19 Apr 2025 16:00:01 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: jonas@...boo.se
Cc: amadeus@....edu.cn,
conor+dt@...nel.org,
dsimic@...jaro.org,
heiko@...ech.de,
krzk+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org,
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ziyao@...root.org
Subject: Re: [PATCH 1/1] arm64: dts: rockchip: rk3528: Add CPU frequency scaling support
Hi,
> There is only one cpu cluster on this SoC, I suggest we name this node
> opp-table-cpu with a cpu_opp_table label.
Sorry for the late reply, I was sick a while ago.
Will do in PATCH v2.
> Both 408 and 600 MHz freq will use a normal PLL and based on the vendor
> opp-table there are chip variants that presumably require 875000
> microvolt.
>
> Because of this 875000 is the lowest microvolt we should use in the
> entire table, to ensure all chip variants can run stable.
Running at 408 to 1008 MHz frequency under bsp kernel, one
of my boards voltages is 850mV and the other is 875mV.
I will use 875mV here instead.
> For remaining freq TF-A will use PVTPLL and configure an osc ring length,
> then the voltage supplied in opp and chip quality will determine/limit
> the real cpu clock speed.
>
> This means that the voltage used is less important when it comes to
> stability. However, we should keep 875000 as the lowest microvolt for
> all opp above.
According to your suggestion, I will use 875mV for 1008/1200 MHz.
Maybe it would be more appropriate to use 900mV for 1200 MHz.
> The voltage for remaining opp does not matter, historically mainline
> picks the highest voltage from vendor tree to ensure stability. With the
> use of PVTPLL that should not really be an issue, and we could pick
> voltages that will give closest speed for majority of users.
Thanks for your suggestion, I will keep this part (> 1200 MHz) unchanged.
Thanks,
Chukun
--
2.25.1
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