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Date: Mon, 21 Apr 2025 10:38:44 +0000
From: Carlos Song <carlos.song@....com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>
CC: "miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>, Frank Li
<frank.li@....com>, "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>, "s.hauer@...gutronix.de"
<s.hauer@...gutronix.de>, "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>, "conor.culhane@...vaco.com"
<conor.culhane@...vaco.com>, "linux-i3c@...ts.infradead.org"
<linux-i3c@...ts.infradead.org>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>,
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Subject: Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and
i.MX95 I3C
> -----Original Message-----
> From: Alexandre Belloni <alexandre.belloni@...tlin.com>
> Sent: Monday, April 21, 2025 3:23 PM
> To: Carlos Song <carlos.song@....com>
> Cc: miquel.raynal@...tlin.com; Frank Li <frank.li@....com>;
> robh@...nel.org; krzk+dt@...nel.org; conor+dt@...nel.org;
> shawnguo@...nel.org; s.hauer@...gutronix.de; kernel@...gutronix.de;
> festevam@...il.com; conor.culhane@...vaco.com;
> linux-i3c@...ts.infradead.org; imx@...ts.linux.dev; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org
> Subject: [EXT] Re: [PATCH 1/3] dt-bindings: i3c: silvaco,i3c-master: add i.MX94
> and i.MX95 I3C
>
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>
>
> On 21/04/2025 14:15:42+0800, carlos.song@....com wrote:
> > From: Carlos Song <carlos.song@....com>
> >
> > Add compatible string "nxp,imx94-i3c" and "nxp,imx95-i3c" for the
> > i.MX94 chip and i.MX95 chip. Backward is compatible with
> "silvaco,i3c-master-v1".
> >
> > Also i.MX94 and i.MX95 I3C only need two clocks and Legacy I3C needs
> > three clocks. So add restrictions for clock and clock-names properties
> > for different Socs.
> >
>
> My guess is that the IP still requires 3 clocks but the integration in the SoC
> feeds the same clock to two of them. I'm not sure this change is required.
>
Hi,
Thank you for your suggestion.
I3C IP in imx94/imx95 is improved based on svc i3c, don't change any register and logic.
One difference from the clk number. IMX94/IMX95 I3C IP removed slow clk input which is not used really.
I take an example of I3C2 in wakeup domain.
In IMX94/95 soc integration connect BUSWAKEUP to pclk and CLK_I3C2SLOW to fast_clk. They don't remove CLK_I3C2 from CCM,
Keep it here. So I also can configure 3 clocks in dts. Nothing will be affected. Also CLK_I3C2 won't have any effect.
In legacy soc, soc integration connect BUSWAKEUP to pclk ,CLK_I3C2 to fast_clk, CLK_I3C2SLOW to slow_clk.
I draw a picture to help understand this.
For imx94/imx95:
┌────────────────────────────────────────────┐
│ │
│ ┌───────┐ soc │
│ │95/943 │ integration │
│ │ i3c │ │
│ └─┬───┬─┘ │
│ pclk│ │fclk │
│ ┌──────► ◄───────────┐ │
│ │ │ │
│ │ ▲ │ │
│ │BUSWAKEUP │CLK_I3C2 │CLK_I3C2SLOW │
│ ┌┼───────────┼──────────┼┐ │
│ │ │ │
│ │ │ │
│ │ CCM │ │
│ │ │ │
│ │ │ │
│ └────────────────────────┘ │
└────────────────────────────────────────────┘
For legacy svc I3C:
┌────────────────────────────────────────────┐
│ │
│ ┌───────┐ soc │
│ │ SVC │ integration │
│ │ i3c │◄────────┐ │
│ └─┬───┬─┘ │ │
│ pclk│ ▲fclk │sclk │
│ ┌──────► │ │ │
│ │ │ │ │
│ │ │ │ │
│ │BUSWAKEUP │ CLK_I3C2 │CLK_I3C2SLOW │
│ ┌┴──────────┴───────────┼┐ │
│ │ │ │
│ │ │ │
│ │ CCM │ │
│ │ │ │
│ │ │ │
│ └────────────────────────┘ │
└────────────────────────────────────────────┘
> > Signed-off-by: Carlos Song <carlos.song@....com>
> > ---
> > .../bindings/i3c/silvaco,i3c-master.yaml | 45 ++++++++++++++++---
> > 1 file changed, 39 insertions(+), 6 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > index 4fbdcdac0aee..9255d35e2854 100644
> > --- a/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > +++ b/Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
> > @@ -9,14 +9,17 @@ title: Silvaco I3C master
> > maintainers:
> > - Conor Culhane <conor.culhane@...vaco.com>
> >
> > -allOf:
> > - - $ref: i3c.yaml#
> > -
> > properties:
> > compatible:
> > - enum:
> > - - nuvoton,npcm845-i3c
> > - - silvaco,i3c-master-v1
> > + oneOf:
> > + - enum:
> > + - nuvoton,npcm845-i3c
> > + - silvaco,i3c-master-v1
> > + - items:
> > + - enum:
> > + - nxp,imx94-i3c
> > + - nxp,imx95-i3c
> > + - const: silvaco,i3c-master-v1
> >
> > reg:
> > maxItems: 1
> > @@ -25,12 +28,14 @@ properties:
> > maxItems: 1
> >
> > clocks:
> > + minItems: 2
> > items:
> > - description: system clock
> > - description: bus clock
> > - description: other (slower) events clock
> >
> > clock-names:
> > + minItems: 2
> > items:
> > - const: pclk
> > - const: fast_clk
> > @@ -46,6 +51,34 @@ required:
> > - clock-names
> > - clocks
> >
> > +allOf:
> > + - $ref: i3c.yaml#
> > + # Legacy Socs need three clocks
> > + - if:
> > + properties:
> > + compatible:
> > + const: silvaco,i3c-master-v1
> > + then:
> > + properties:
> > + clocks:
> > + minItems: 3
> > + clock-names:
> > + minItems: 3
> > + # imx94 and imx95 Soc need two clocks
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - nxp,imx94-i3c
> > + - nxp,imx95-i3c
> > + then:
> > + properties:
> > + clocks:
> > + maxItems: 2
> > + clock-names:
> > + maxItems: 2
> > +
> > unevaluatedProperties: false
> >
> > examples:
> > --
> > 2.34.1
> >
>
> --
> Alexandre Belloni, co-owner and COO, Bootlin Embedded Linux and Kernel
> engineering
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