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Message-ID: <aAaHpQPTehQ0uqJm@lizhi-Precision-Tower-5810>
Date: Mon, 21 Apr 2025 14:00:05 -0400
From: Frank Li <Frank.li@....com>
To: carlos.song@....com
Cc: miquel.raynal@...tlin.com, alexandre.belloni@...tlin.com,
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
	shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
	festevam@...il.com, conor.culhane@...vaco.com,
	linux-i3c@...ts.infradead.org, imx@...ts.linux.dev,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V2 3/3] arm64: dts: imx95: correct i3c node in imx95

On Mon, Apr 21, 2025 at 07:15:13PM +0800, carlos.song@....com wrote:
> From: Carlos Song <carlos.song@....com>
>
> I.MX95 I3C only need two clocks. Add "nxp,imx95-i3c" compatible string for
> all I3Cs. And correct I3C2 pclk in wakeup domain to IMX95_CLK_BUSWAKEUP.

correct pclk in wakeup domain to IMX95_CLK_BUSWAKEUP need sepeate patch
with fix tag and cc stable

Frank
>
> Signed-off-by: Carlos Song <carlos.song@....com>
> ---
> - No change for V2
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 9bb26b466a06..fe28c0c46eb6 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -681,15 +681,14 @@ tpm6: pwm@...10000 {
>  			};
>
>  			i3c2: i3c@...20000 {
> -				compatible = "silvaco,i3c-master-v1";
> +				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
>  				reg = <0x42520000 0x10000>;
>  				interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
>  				#address-cells = <3>;
>  				#size-cells = <0>;
> -				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
> -					 <&scmi_clk IMX95_CLK_I3C2>,
> +				clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
>  					 <&scmi_clk IMX95_CLK_I3C2SLOW>;
> -				clock-names = "pclk", "fast_clk", "slow_clk";
> +				clock-names = "pclk", "fast_clk";
>  				status = "disabled";
>  			};
>
> @@ -1266,15 +1265,14 @@ tpm2: pwm@...20000 {
>  			};
>
>  			i3c1: i3c@...30000 {
> -				compatible = "silvaco,i3c-master-v1";
> +				compatible = "nxp,imx95-i3c", "silvaco,i3c-master-v1";
>  				reg = <0x44330000 0x10000>;
>  				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
>  				#address-cells = <3>;
>  				#size-cells = <0>;
>  				clocks = <&scmi_clk IMX95_CLK_BUSAON>,
> -					 <&scmi_clk IMX95_CLK_I3C1>,
>  					 <&scmi_clk IMX95_CLK_I3C1SLOW>;
> -				clock-names = "pclk", "fast_clk", "slow_clk";
> +				clock-names = "pclk", "fast_clk";
>  				status = "disabled";
>  			};
>
> --
> 2.34.1
>

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