linux-kernel - Re: [PATCH v3 2/2] arm64: dts: ti: k3-j784s4-j742s2-evm-common: enable ACSPCIE0 output for PCIe1

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Message-ID: <87b9ab38-48e8-4e51-8485-16e944ee0d57@ti.com>
Date: Tue, 22 Apr 2025 19:43:42 +0530
From: "Kumar, Udit" <u-kumar1@...com>
To: Siddharth Vadapalli <s-vadapalli@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <parth105105@...il.com>,
        <parth.pancholi@...adex.com>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <srk@...com>,
        <u-kumar1@...com>
Subject: Re: [PATCH v3 2/2] arm64: dts: ti: k3-j784s4-j742s2-evm-common:
 enable ACSPCIE0 output for PCIe1

Thanks for fixing at board level

On 4/22/2025 6:02 PM, Siddharth Vadapalli wrote:
> The PCIe reference clock required by the PCIe Endpoints connected to the
> PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4-EVM
> and J742S2-EVM is driven by the ACSPCIE0 module. Add the device-tree
> support for enabling the same.
>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> ---
>
> The previous versions of this series were a single patch. Based on the
> feedback received on previous versions, the SoC and Board support has
> been split in order to allow reuse for other Boards based on the same
> SoC.
>
> v2 patch:
> https://lore.kernel.org/r/20250411121307.793646-1-s-vadapalli@ti.com/
> Changes since v2 patch:
> - The SoC and board changes have been split across:
>    k3-j784s4-j742s2-main-common.dtsi and k3-j784s4-j742s2-evm-common.dtsi
>    respectively.
>
> Regards,
> Siddharth.
>
>   arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> index 2664f74a9c7a..fa656b7b13a1 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> @@ -5,6 +5,9 @@
>    * EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458
>    * EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001
>    */
> +
> +#include <dt-bindings/phy/phy-cadence.h>
> +
>   / {
>   	chosen {
>   		stdout-path = "serial2:115200n8";
> @@ -1407,10 +1410,13 @@ &main_mcan4 {
>   
>   &pcie1_rc {
>   	status = "okay";
> +	clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>;
> +	clock-names = "fck", "pcie_refclk";
>   	num-lanes = <2>;
>   	reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>;
>   	phys = <&serdes0_pcie1_link>;
>   	phy-names = "pcie-phy";
> +	ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x1>;

Reviewed-by: Udit Kumar <u-kumar1@...com>


>   };
>   
>   &serdes1 {