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Message-Id: <20250422061406.112539-6-huaqian.li@siemens.com>
Date: Tue, 22 Apr 2025 14:14:04 +0800
From: huaqian.li@...mens.com
To: helgaas@...nel.org
Cc: baocheng.su@...mens.com,
bhelgaas@...gle.com,
conor+dt@...nel.org,
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Subject: [PATCH v8 5/7] arm64: dts: ti: k3-am65-main: Add PVU nodes
From: Jan Kiszka <jan.kiszka@...mens.com>
Add nodes for the two PVUs of the AM65. Keep them disabled, though,
because the board has to additionally define DMA pools and the devices
to be isolated.
Signed-off-by: Jan Kiszka <jan.kiszka@...mens.com>
Signed-off-by: Li Hua Qian <huaqian.li@...mens.com>
---
arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 94a812a1355b..977c66a3a7c7 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -841,6 +841,26 @@ main_cpts_mux: refclk-mux {
assigned-clock-parents = <&k3_clks 118 5>;
};
};
+
+ ti_pvu0: iommu@...80000 {
+ compatible = "ti,am654-pvu";
+ reg = <0 0x30f80000 0 0x1000>,
+ <0 0x36000000 0 0x100000>;
+ reg-names = "cfg", "tlbif";
+ interrupts-extended = <&intr_main_navss 390>;
+ interrupt-names = "pvu";
+ status = "disabled";
+ };
+
+ ti_pvu1: iommu@...81000 {
+ compatible = "ti,am654-pvu";
+ reg = <0 0x30f81000 0 0x1000>,
+ <0 0x36100000 0 0x100000>;
+ reg-names = "cfg", "tlbif";
+ interrupts-extended = <&intr_main_navss 389>;
+ interrupt-names = "pvu";
+ status = "disabled";
+ };
};
main_gpio0: gpio@...000 {
--
2.34.1
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