linux-kernel - Re: [PATCH v1 7/9] coresight: Make clock sequence consistent

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20250422092107.GC28953@e132581.arm.com>
Date: Tue, 22 Apr 2025 10:21:07 +0100
From: Leo Yan <leo.yan@....com>
To: Anshuman Khandual <anshuman.khandual@....com>
Cc: Suzuki K Poulose <suzuki.poulose@....com>,
	Mike Leach <mike.leach@...aro.org>,
	James Clark <james.clark@...aro.org>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH v1 7/9] coresight: Make clock sequence consistent

On Thu, Apr 03, 2025 at 12:40:39PM +0530, Anshuman Khandual wrote:
> On 3/27/25 17:08, Leo Yan wrote:
> > Since atclk is enabled after pclk during the probe phase, this commit
> > maintains the same sequence for the runtime resume flow.
> > 
> > Signed-off-by: Leo Yan <leo.yan@....com>
> > ---
> >  drivers/hwtracing/coresight/coresight-funnel.c     | 6 +++---
> >  drivers/hwtracing/coresight/coresight-replicator.c | 6 +++---
> >  drivers/hwtracing/coresight/coresight-stm.c        | 6 +++---
> >  drivers/hwtracing/coresight/coresight-tpiu.c       | 6 +++---
> >  4 files changed, 12 insertions(+), 12 deletions(-)
> > 
> > diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
> > index ec6d3e656548..e378c2fffca9 100644
> > --- a/drivers/hwtracing/coresight/coresight-funnel.c
> > +++ b/drivers/hwtracing/coresight/coresight-funnel.c
> > @@ -299,11 +299,11 @@ static int funnel_runtime_resume(struct device *dev)
> >  {
> >  	struct funnel_drvdata *drvdata = dev_get_drvdata(dev);
> >  
> > -	if (drvdata && !IS_ERR(drvdata->atclk))
> > -		clk_prepare_enable(drvdata->atclk);
> > -
> >  	if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk))
> >  		clk_prepare_enable(drvdata->pclk);
> > +
> > +	if (drvdata && !IS_ERR(drvdata->atclk))
> > +		clk_prepare_enable(drvdata->atclk);
> >  	return 0;
> >  }
> 
> funnel_probe() enables pclk after atclk though - which needs to be
> reversed as well ?

Good point!

The key point is a dynamic probe enables pclk clock in AMBA bus driver,
which is anyway prior to enable atclk.

We need to keep consistent flow for all flows (static probe, dynamic
probe, runtime PM resume).  The patch 09 consolidates clock enabling for
static and dynamic probe, and this patch is for runtime PM.

For a better organization, I will place this patch after the patch 09
in the next spin.

[...]

> I assume this patch is trying to have the same clock sequence enablement
> during original probe and resume path and then just the reverse sequence
> during suspend path.

Correct.  As said, the patch 09 is for clock enabling sequence in
probe, and this patch is for the resume path.

Thanks,
Leo