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Message-Id: <20250422-x1e80100-dts-fix-pcie3-dbi-size-v1-1-c197701fd7e4@linaro.org>
Date: Tue, 22 Apr 2025 14:03:16 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Qiang Yu <quic_qianyu@...cinc.com>,
Dmitry Baryshkov <lumag@...nel.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Johan Hovold <johan+linaro@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org,
Abel Vesa <abel.vesa@...aro.org>
Subject: [PATCH] arm64: dts: qcom: x1e80100: Fix PCIe 3rd controller DBI
size
According to documentation, the DBI range size is 0xf20. So fix it.
Cc: stable@...r.kernel.org # 6.14
Fixes: f8af195beeb0 ("arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100")
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 46b79fce92c90d969e3de48bc88e27915d1592bb..34ccabc3cc302b17e944b4343a37fab0bb6334e9 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -3126,7 +3126,7 @@ pcie3: pcie@...0000 {
device_type = "pci";
compatible = "qcom,pcie-x1e80100";
reg = <0x0 0x01bd0000 0x0 0x3000>,
- <0x0 0x78000000 0x0 0xf1d>,
+ <0x0 0x78000000 0x0 0xf20>,
<0x0 0x78000f40 0x0 0xa8>,
<0x0 0x78001000 0x0 0x1000>,
<0x0 0x78100000 0x0 0x100000>,
---
base-commit: bc8aa6cdadcc00862f2b5720e5de2e17f696a081
change-id: 20250422-x1e80100-dts-fix-pcie3-dbi-size-56fc110aa36d
Best regards,
--
Abel Vesa <abel.vesa@...aro.org>
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