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Message-ID: <87frhysyyp.fsf@trenco.lwn.net>
Date: Wed, 23 Apr 2025 09:02:22 -0600
From: Jonathan Corbet <corbet@....net>
To: Mario Limonciello <superm1@...nel.org>, Borislav Petkov <bp@...en8.de>,
Jean Delvare <jdelvare@...e.com>, Andi Shyti <andi.shyti@...nel.org>, Ilpo
Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: Mario Limonciello <mario.limonciello@....com>, Yazen Ghannam
<yazen.ghannam@....com>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar
<mingo@...hat.com>, Dave Hansen <dave.hansen@...ux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>, "H .
Peter Anvin" <hpa@...or.com>, Shyam Sundar S K <Shyam-sundar.S-k@....com>,
Hans de Goede <hdegoede@...hat.com>, "open list:DOCUMENTATION"
<linux-doc@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>,
"open list:I2C/SMBUS CONTROLLER DRIVERS FOR PC"
<linux-i2c@...r.kernel.org>, "open list:AMD PMC DRIVER"
<platform-driver-x86@...r.kernel.org>
Subject: Re: [PATCH v5 0/5] AMD Zen debugging documentation
Mario Limonciello <superm1@...nel.org> writes:
> From: Mario Limonciello <mario.limonciello@....com>
>
> Introduce documentation for debugging some issues on AMD zen hardware.
> As one of the debugging techniques read and add information for
> S5_RESET_STATUS register.
I've been assuming that this work will go through the x86 tree; please
let me know if you'd like me to pick it up instead.
Thanks,
jon
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