linux-kernel - Re: [PATCH v3 2/3] PCI: dw-rockchip: Reorganize register and bitfield definitions

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Message-ID: <aAkoWCtCS7Lxx3Gx@ryzen>
Date: Wed, 23 Apr 2025 19:50:16 +0200
From: Niklas Cassel <cassel@...nel.org>
To: Hans Zhang <18255117159@....com>
Cc: lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
	heiko@...ech.de, manivannan.sadhasivam@...aro.org, robh@...nel.org,
	jingoohan1@...il.com, shawn.lin@...k-chips.com,
	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v3 2/3] PCI: dw-rockchip: Reorganize register and
 bitfield definitions

On Wed, Apr 23, 2025 at 11:32:13PM +0800, Hans Zhang wrote:
> Register definitions were scattered with ambiguous names (e.g.,
> PCIE_RDLH_LINK_UP_CHGED in PCIE_CLIENT_INTR_STATUS_MISC) and lacked
> hierarchical grouping. Magic values for bit operations reduced code
> clarity.
> 
> Group registers and their associated bitfields logically. This improves
> maintainability and aligns the code with hardware documentation.
> 
> Signed-off-by: Hans Zhang <18255117159@....com>
> ---

Reviewed-by: Niklas Cassel <cassel@...nel.org>