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Message-ID: <aAiaiomYczA22xik@Asurada-Nvidia>
Date: Wed, 23 Apr 2025 00:45:14 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Vasant Hegde <vasant.hegde@....com>
CC: <jgg@...dia.com>, <kevin.tian@...el.com>, <corbet@....net>,
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Subject: Re: [PATCH v1 00/16] iommufd: Add vIOMMU infrastructure (Part-4
vCMDQ)
On Wed, Apr 23, 2025 at 12:58:19PM +0530, Vasant Hegde wrote:
> On 4/11/2025 12:07 PM, Nicolin Chen wrote:
> > The vIOMMU object is designed to represent a slice of an IOMMU HW for its
> > virtualization features shared with or passed to user space (a VM mostly)
> > in a way of HW acceleration. This extended the HWPT-based design for more
> > advanced virtualization feature.
> >
> > A vCMDQ introduced by this series as a part of the vIOMMU infrastructure
> > represents a HW supported queue/buffer for VM to use exclusively, e.g.
> > - NVIDIA's virtual command queue
> > - AMD vIOMMU's command buffer
>
> I assume we can pass multiple buffer details (like GPA, size) from guest to
> hypervisor. Is that correct understanding?
Yes. The NVIDIA model passes through a Virtual-Interface to a VM,
and the VM can allocate and map multiple command queues (buffers)
to the V-Interface, by providing each command queue info in:
+struct iommu_vcmdq_tegra241_cmdqv {
+ __u32 vcmdq_id;
+ __u32 vcmdq_log2size; // size
+ __aligned_u64 vcmdq_base; // GPA
};
Thanks
Nicolin
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