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Message-ID: <CACRpkdYgkDpC1iJ-KaZj2GZ3A3_V=3-KQef_nCRhMDrUK=FHXg@mail.gmail.com>
Date: Wed, 23 Apr 2025 12:55:19 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Icenowy Zheng <uwu@...nowy.me>
Cc: Emil Renner Berthing <kernel@...il.dk>, Jianlong Huang <jianlong.huang@...rfivetech.com>, 
	Hal Feng <hal.feng@...rfivetech.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-riscv@...ts.infradead.org
Subject: Re: [RFC PATCH 1/3] dt-bindings: pinctrl: jh7110-sys: add force inputs

On Wed, Apr 23, 2025 at 11:41 AM Icenowy Zheng <uwu@...nowy.me> wrote:
> 于 2025年4月23日 GMT+08:00 17:09:42,Linus Walleij <linus.walleij@...aro.org> 写道:
> >Hi Icenowy,
> >
> >thanks for your patch!
> >
> >On Tue, Apr 22, 2025 at 6:23 PM Icenowy Zheng <uwu@...nowy.me> wrote:
> >
> >> +  starfive,force-low-inputs:
> >> +    description:
> >> +      The list of input signals forced to be low inside the SoC itself.
> >> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> >
> >I don't see why you need this hack.
>
> Unfortunately these properties are not for pins, but internal signals that isn't
> bound to external pins.

We don't really care if pins are external or not, we are an operating system
not a philosophy department ;)

You calculate the offset and shift like this and write into a base+offset:

+                       offset = 4 * (pin / 4);
+                       shift  = 8 * (pin % 4);
+
+                       val = readl_relaxed(sfp->base +
+                                           info->gpi_reg_base + offset);

Compare to jh7110_pin_dbg_show():

               unsigned int offset = 4 * (pin / 4);
                unsigned int shift  = 8 * (pin % 4);
                u32 dout = readl_relaxed(sfp->base +
info->dout_reg_base + offset);
                u32 doen = readl_relaxed(sfp->base +
info->doen_reg_base + offset);

So clearly the entities that you affect are in the same numberspace,
and that is all we care about. They are not enumerated in any way
orthogonal to any other pins AFAICT.

Both pin control and GPIO handle chip-internal lines that are not
routed outside sometimes, that's fine. Just deal with them as any other
"pins".

Yours,
Linus Walleij

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