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Message-ID: <fc6b1fe6-7847-4aa8-838a-dbd0ad675412@oss.qualcomm.com>
Date: Wed, 23 Apr 2025 13:23:47 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Mrinmay Sarkar <mrinmay.sarkar@....qualcomm.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
krishna.chundru@....qualcomm.com, quic_vbadigan@...cinc.com,
quic_nayiluri@...cinc.com, quic_ramkri@...cinc.com,
quic_nitegupt@...cinc.com
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: Set max link speed to Gen4
for PCIe EP
On 4/23/25 1:15 PM, Mrinmay Sarkar wrote:
> The maximum link speed was previously restricted to Gen3 due to
> the absence of Gen4 equalization support in the driver.
>
> Add this change to set the maximum link speed to Gen4, as Gen4
> equalization support has now been added into the driver.
>
> Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@....qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 5bd0c03476b143444543c68cd1c1d475c3302555..65d9433a298f80eb782439120ad9c3c74025b441 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -6462,7 +6462,7 @@ pcie0_ep: pcie-ep@...0000 {
> power-domains = <&gcc PCIE_0_GDSC>;
> phys = <&pcie0_phy>;
> phy-names = "pciephy";
> - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
> + max-link-speed = <4>;
The property may now be removed, as 4 is the value read out from
the hardware
Konrad
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