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Message-ID: <CAMuHMdUKVDzLUfcr_0R_VQ0TzBtPWGVbwfX_pKbwOjzuaBLcEw@mail.gmail.com>
Date: Wed, 23 Apr 2025 13:37:15 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>,
Biju Das <biju.das.jz@...renesas.com>, dmaengine@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v6 2/6] dt-bindings: dma: rz-dmac: Document RZ/V2H(P)
family of SoCs
Hi Fabrizio,
On Tue, 22 Apr 2025 at 19:40, Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
> The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
> Renesas RZ/G2L family of SoCs, but there are some differences:
> * It only uses one register area
> * It only uses one clock
> * It only uses one reset
> * Instead of using MID/IRD it uses REQ No
> * It is connected to the Interrupt Control Unit (ICU)
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v5->v6:
> * Reworked the description of `#dma-cells`.
> * Reworked `renesas,icu` related descriptions.
> * Added `reg:`->`minItems: 2` for `renesas,r7s72100-dmac`.
> * Since the structure of the document remains the same, I have kept
> the tags I have received. Please let me know if that's not okay.
Thanks for the update!
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> @@ -80,12 +85,26 @@ properties:
> items:
> - description: Reset for DMA ARESETN reset terminal
> - description: Reset for DMA RST_ASYNC reset terminal
> + minItems: 1
>
> reset-names:
> items:
> - const: arst
> - const: rst_async
>
> + renesas,icu:
> + description:
> + It must contain the phandle to the ICU, and the index of the DMAC as seen
> + from the ICU (e.g. parameter k from register ICU_DMkSELy).
Doesn't really hurt, but this description is identical to the formal
description of the items below.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to the ICU node.
Phandle
> + - description:
> + The number of the DMAC as seen from the ICU, i.e. parameter k from
> + register ICU_DMkSELy. This may differ from the actual DMAC instance
> + number.
> +
> required:
> - compatible
> - reg
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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